MIPS: Fix testcases r6_beqzc and mov.

test/cctest/test-assembler-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1135 matching lines @@
     uint32_t trunc_big_out;
     uint32_t trunc_small_out;
     uint32_t cvt_big_in;
     uint32_t cvt_small_in;
   } T;
   T t;
 
   MacroAssembler assm(isolate, NULL, 0);
 
   __ sw(t0, MemOperand(a0, offsetof(T, cvt_small_in)));
-  __ Cvt_d_uw(f10, t0, f22);
+  __ Cvt_d_uw(f10, t0, f16);
   __ sdc1(f10, MemOperand(a0, offsetof(T, cvt_small_out)));
 
-  __ Trunc_uw_d(f10, f10, f22);
+  __ Trunc_uw_d(f10, f10, f16);
   __ swc1(f10, MemOperand(a0, offsetof(T, trunc_small_out)));
 
   __ sw(t0, MemOperand(a0, offsetof(T, cvt_big_in)));
-  __ Cvt_d_uw(f8, t0, f22);
+  __ Cvt_d_uw(f8, t0, f16);
   __ sdc1(f8, MemOperand(a0, offsetof(T, cvt_big_out)));
 
-  __ Trunc_uw_d(f8, f8, f22);
+  __ Trunc_uw_d(f8, f8, f16);
   __ swc1(f8, MemOperand(a0, offsetof(T, trunc_big_out)));
 
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   assm.GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F3 f = FUNCTION_CAST<F3>(code->entry());
@@ skipping 1325 matching lines @@
 
   __ lwc1(f2, MemOperand(a0, offsetof(TestFloat, a)) );
   __ ldc1(f8, MemOperand(a0, offsetof(TestFloat, c)) );
   __ sqrt_s(f6, f2);
   __ sqrt_d(f12, f8);
 
   if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
     __ rsqrt_d(f14, f8);
     __ rsqrt_s(f16, f2);
     __ recip_d(f18, f8);
-    __ recip_s(f20, f2);
+    __ recip_s(f4, f2);
   }
   __ swc1(f6, MemOperand(a0, offsetof(TestFloat, resultS)) );
   __ sdc1(f12, MemOperand(a0, offsetof(TestFloat, resultD)) );
 
   if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
     __ swc1(f16, MemOperand(a0, offsetof(TestFloat, resultS1)) );
     __ sdc1(f14, MemOperand(a0, offsetof(TestFloat, resultD1)) );
-    __ swc1(f20, MemOperand(a0, offsetof(TestFloat, resultS2)) );
+    __ swc1(f4, MemOperand(a0, offsetof(TestFloat, resultS2)) );
     __ sdc1(f18, MemOperand(a0, offsetof(TestFloat, resultD2)) );
   }
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   assm.GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F3 f = FUNCTION_CAST<F3>(code->entry());
@@ skipping 168 matching lines @@
     4.8, 4.8, -4.8, -0.29
   };
 
   float outputs_S[kTableLength] = {
     4.8, 4.8, -4.8, -0.29
   };
   double outputs_D[kTableLength] = {
     5.3, -5.3, 5.3, -2.9
   };
 
-  __ ldc1(f2, MemOperand(a0, offsetof(TestFloat, a)) );
+  __ ldc1(f5, MemOperand(a0, offsetof(TestFloat, a)) );

[petarj, 2015/09/11 14:02:28]

Is it possible for this test to be run in fp32 mode? In case it is, you can not
use odd registers.

   __ lwc1(f6, MemOperand(a0, offsetof(TestFloat, c)) );
   __ mov_s(f18, f6);
-  __ mov_d(f20, f2);
+  __ mov_d(f17, f5);

[petarj, 2015/09/11 14:02:28]

Same here.

   __ swc1(f18, MemOperand(a0, offsetof(TestFloat, d)) );
-  __ sdc1(f20, MemOperand(a0, offsetof(TestFloat, b)) );
+  __ sdc1(f17, MemOperand(a0, offsetof(TestFloat, b)) );

[petarj, 2015/09/11 14:02:28]

Ditto.

+
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   assm.GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F3 f = FUNCTION_CAST<F3>(code->entry());
   for (int i = 0; i < kTableLength; i++) {
     test.a = inputs_D[i];
@@ skipping 1946 matching lines @@
 
 uint64_t run_beqzc(int32_t value, int32_t offset) {
   Isolate* isolate = CcTest::i_isolate();
   HandleScope scope(isolate);
 
   MacroAssembler assm(isolate, NULL, 0);
 
   Label stop_execution;
   __ li(v0, 0);
   __ li(t1, 0x66);
-  __ push(ra);
 
   __ addiu(v0, v0, 0x1);        // <-- offset = -32
   __ addiu(v0, v0, 0x2);
   __ addiu(v0, v0, 0x10);
   __ addiu(v0, v0, 0x20);
   __ beq(v0, t1, &stop_execution);
   __ nop();
 
   __ beqzc(a0, offset);         // BEQZC rs, offset
 
   __ addiu(v0, v0,    0x1);
   __ addiu(v0, v0,  0x100);
   __ addiu(v0, v0,  0x200);
   __ addiu(v0, v0, 0x1000);
   __ addiu(v0, v0, 0x2000);   // <--- offset = 16
   __ jr(ra);
   __ nop();
 
   __ bind(&stop_execution);
-  __ pop(ra);
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   assm.GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
 
   F2 f = FUNCTION_CAST<F2>(code->entry());
 
@@ skipping 386 matching lines @@
   };
 
   size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseBal);
   for (size_t i = 0; i < nr_test_cases; ++i) {
     CHECK_EQ(tc[i].expected_res, run_bal(tc[i].offset));
   }
 }
 
 
 #undef __