win x86: Grab bag of restructuring to get tests working on x86-on-x86

snapshot/win/cpu_context_win.cc

 // Copyright 2015 The Crashpad Authors. All rights reserved.
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
 // You may obtain a copy of the License at
 //
 //     http://www.apache.org/licenses/LICENSE-2.0
 //
 // Unless required by applicable law or agreed to in writing, software
 // distributed under the License is distributed on an "AS IS" BASIS,
@@ skipping 10 matching lines @@
 
 namespace crashpad {
 
 #if defined(ARCH_CPU_64_BITS)
 
 void InitializeX86Context(const WOW64_CONTEXT& context, CPUContextX86* out) {
   CHECK(false) << "TODO(scottmg) InitializeX86Context()";
 }
 
 void InitializeX64Context(const CONTEXT& context, CPUContextX86_64* out) {
-  out->rax = context.Rax;
-  out->rbx = context.Rbx;
-  out->rcx = context.Rcx;
-  out->rdx = context.Rdx;
-  out->rdi = context.Rdi;
-  out->rsi = context.Rsi;
-  out->rbp = context.Rbp;
-  out->rsp = context.Rsp;
-  out->r8 = context.R8;
-  out->r9 = context.R9;
-  out->r10 = context.R10;
-  out->r11 = context.R11;
-  out->r12 = context.R12;
-  out->r13 = context.R13;
-  out->r14 = context.R14;
-  out->r15 = context.R15;
-  out->rip = context.Rip;
-  out->rflags = context.EFlags;
-  out->cs = context.SegCs;
-  out->fs = context.SegFs;
-  out->gs = context.SegGs;
+  memset(out, 0, sizeof(*out));
 
-  out->dr0 = context.Dr0;
-  out->dr1 = context.Dr1;
-  out->dr2 = context.Dr2;
-  out->dr3 = context.Dr3;
-  // DR4 and DR5 are obsolete synonyms for DR6 and DR7, see
-  // http://en.wikipedia.org/wiki/X86_debug_register.
-  out->dr4 = context.Dr6;
-  out->dr5 = context.Dr7;
-  out->dr6 = context.Dr6;
-  out->dr7 = context.Dr7;
+  LOG_IF(ERROR, !(context.ContextFlags & CONTEXT_AMD64)) << "non-x64 context";
 
-  static_assert(sizeof(out->fxsave) == sizeof(context.FltSave),
-                "types must be equivalent");
-  memcpy(&out->fxsave, &context.FltSave.ControlWord, sizeof(out->fxsave));
+  if (context.ContextFlags & CONTEXT_CONTROL) {
+    out->cs = context.SegCs;
+    out->rflags = context.EFlags;
+    out->rip = context.Rip;
+    out->rsp = context.Rsp;
+    // SegSs ignored.
+  }
+
+  if (context.ContextFlags & CONTEXT_INTEGER) {
+    out->rax = context.Rax;
+    out->rbx = context.Rbx;
+    out->rcx = context.Rcx;
+    out->rdx = context.Rdx;
+    out->rdi = context.Rdi;
+    out->rsi = context.Rsi;
+    out->rbp = context.Rbp;
+    out->r8 = context.R8;
+    out->r9 = context.R9;
+    out->r10 = context.R10;
+    out->r11 = context.R11;
+    out->r12 = context.R12;
+    out->r13 = context.R13;
+    out->r14 = context.R14;
+    out->r15 = context.R15;
+  }
+
+  if (context.ContextFlags & CONTEXT_SEGMENTS) {
+    out->fs = context.SegFs;
+    out->gs = context.SegGs;
+    // SegDs ignored.

[Mark Mentovai, 2015/09/16 20:52:58]

Here’s a question that’s got nothing to do with this code, it’s more about the
CONTEXT structures and WoW64.

Based on some of the things we talked about last week and this week, my
understanding of WoW64 is that the 64-bit kernel roughly doesn’t care about
whether a thread is in 32-bit or 64-bit mode, which is controlled by its choice
of cs. In order for this to work, the context that gets saved and restored needs
to always be the full 64-bit register file, because regardless of whether a
thread has the 32-bit or 64-bit cs in effect, it may have switched in the past
and may switch again in the future.

Now the problem is that the 64-bit CONTEXT structure doesn’t have room for ds,
es, and ss. So what happens if a thread in 32-bit mode modifies those segment
registers and then flips to a 64-bit cs? When it gets preempted, will the
changes it made to the segment registers be lost?

There’s WOW64_CONTEXT which is identical to the 32-bit CONTEXT, but that doesn’t
have the full 64-bit register extensions, so if that’s used to save the state of
a thread found in 32-bit mode, and the thread later flips back to 64, all of the
high bits will be lost along with the full contents of the extra registers.

I figure there are a few possibilities:
 - This actually doesn’t work at all, and if you mess with cs, you’d better not
change ds, es, or ss. (This may be the policy even if you’re not changing cs.)
 - Some structure other than CONTEXT is used internally for preemption.
 - CONTEXT and WOW64_CONTEXT are used depending on whether the process is
supposed to be WoW64, so if you flip to the other-bitted cs and get preempted,
your register file will be in an inconsistent state and you’ll almost certainly
crash as soon as you get a chance to run again. (This can’t be right, because
under WoW64, the Windows libraries themselves flip to 64-bit mode.)
 - Some other part of my mental model of how this works isn’t right.

Do you know anything else about this? I’m trying to square these CONTEXT
structures with mixed 32/64-bit code, which must work somehow.

+    // SegEs ignored.
+  }
+
+  if (context.ContextFlags & CONTEXT_DEBUG_REGISTERS) {
+    out->dr0 = context.Dr0;
+    out->dr1 = context.Dr1;
+    out->dr2 = context.Dr2;
+    out->dr3 = context.Dr3;
+    // DR4 and DR5 are obsolete synonyms for DR6 and DR7, see
+    // https://en.wikipedia.org/wiki/X86_debug_register.
+    out->dr4 = context.Dr6;
+    out->dr5 = context.Dr7;
+    out->dr6 = context.Dr6;
+    out->dr7 = context.Dr7;
+  }
+
+  if (context.ContextFlags & CONTEXT_FLOATING_POINT) {
+    static_assert(sizeof(out->fxsave) == sizeof(context.FltSave),
+                  "types must be equivalent");
+    memcpy(&out->fxsave, &context.FltSave.ControlWord, sizeof(out->fxsave));
+  }
 }
 
 #else  // ARCH_CPU_64_BITS
 
 void InitializeX86Context(const CONTEXT& context, CPUContextX86* out) {
-  CHECK(false) << "TODO(scottmg) InitializeX86Context()";
+  memset(out, 0, sizeof(*out));
+
+  LOG_IF(ERROR, !(context.ContextFlags & CONTEXT_i386)) << "non-x86 context";
+
+  if (context.ContextFlags & CONTEXT_CONTROL) {
+    out->ebp = context.Ebp;
+    out->eip = context.Eip;
+    out->cs = static_cast<uint16_t>(context.SegCs);
+    out->eflags = context.EFlags;
+    out->esp = context.Esp;
+    out->ss = static_cast<uint16_t>(context.SegSs);
+  }
+
+  if (context.ContextFlags & CONTEXT_INTEGER) {
+    out->eax = context.Eax;
+    out->ebx = context.Ebx;
+    out->ecx = context.Ecx;
+    out->edx = context.Edx;
+    out->edi = context.Edi;
+    out->esi = context.Esi;
+  }
+
+  if (context.ContextFlags & CONTEXT_SEGMENTS) {
+    out->ds = static_cast<uint16_t>(context.SegDs);
+    out->es = static_cast<uint16_t>(context.SegEs);
+    out->fs = static_cast<uint16_t>(context.SegFs);
+    out->gs = static_cast<uint16_t>(context.SegGs);
+  }
+
+  if (context.ContextFlags & CONTEXT_DEBUG_REGISTERS) {
+    out->dr0 = context.Dr0;
+    out->dr1 = context.Dr1;
+    out->dr2 = context.Dr2;
+    out->dr3 = context.Dr3;
+    // DR4 and DR5 are obsolete synonyms for DR6 and DR7, see
+    // https://en.wikipedia.org/wiki/X86_debug_register.
+    out->dr4 = context.Dr6;
+    out->dr5 = context.Dr7;
+    out->dr6 = context.Dr6;
+    out->dr7 = context.Dr7;
+  }
+
+  if (context.ContextFlags & CONTEXT_EXTENDED_REGISTERS) {
+    static_assert(sizeof(out->fxsave) == sizeof(context.ExtendedRegisters),
+                  "types must be equivalent");
+    memcpy(&out->fxsave, &context.ExtendedRegisters, sizeof(out->fxsave));
+  } else if (context.ContextFlags & CONTEXT_FLOATING_POINT) {
+    CHECK(false) << "TODO(scottmg): extract x87 data";
+  }
 }
 
 #endif  // ARCH_CPU_64_BITS
 
 }  // namespace crashpad