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Issue 1334793004: MIPS64: Add big-endian support for mips64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase ToT. Created 5 years, 2 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #if V8_TARGET_ARCH_MIPS64 10 #if V8_TARGET_ARCH_MIPS64
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1045 1045
1046 1046
1047 void Simulator::set_fpu_register(int fpureg, int64_t value) { 1047 void Simulator::set_fpu_register(int fpureg, int64_t value) {
1048 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1048 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1049 FPUregisters_[fpureg] = value; 1049 FPUregisters_[fpureg] = value;
1050 } 1050 }
1051 1051
1052 1052
1053 void Simulator::set_fpu_register_word(int fpureg, int32_t value) { 1053 void Simulator::set_fpu_register_word(int fpureg, int32_t value) {
1054 // Set ONLY lower 32-bits, leaving upper bits untouched. 1054 // Set ONLY lower 32-bits, leaving upper bits untouched.
1055 // TODO(plind): big endian issue.
1056 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1055 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1057 int32_t *pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]); 1056 int32_t* pword;
1057 if (kArchEndian == kLittle) {
1058 pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]);
1059 } else {
1060 pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]) + 1;
1061 }
1058 *pword = value; 1062 *pword = value;
1059 } 1063 }
1060 1064
1061 1065
1062 void Simulator::set_fpu_register_hi_word(int fpureg, int32_t value) { 1066 void Simulator::set_fpu_register_hi_word(int fpureg, int32_t value) {
1063 // Set ONLY upper 32-bits, leaving lower bits untouched. 1067 // Set ONLY upper 32-bits, leaving lower bits untouched.
1064 // TODO(plind): big endian issue.
1065 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1068 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1066 int32_t *phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1; 1069 int32_t* phiword;
1070 if (kArchEndian == kLittle) {
1071 phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1;
1072 } else {
1073 phiword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]);
1074 }
1067 *phiword = value; 1075 *phiword = value;
1068 } 1076 }
1069 1077
1070 1078
1071 void Simulator::set_fpu_register_float(int fpureg, float value) { 1079 void Simulator::set_fpu_register_float(int fpureg, float value) {
1072 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1080 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1073 *bit_cast<float*>(&FPUregisters_[fpureg]) = value; 1081 *bit_cast<float*>(&FPUregisters_[fpureg]) = value;
1074 } 1082 }
1075 1083
1076 1084
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4487 } 4495 }
4488 4496
4489 4497
4490 #undef UNSUPPORTED 4498 #undef UNSUPPORTED
4491 } // namespace internal 4499 } // namespace internal
4492 } // namespace v8 4500 } // namespace v8
4493 4501
4494 #endif // USE_SIMULATOR 4502 #endif // USE_SIMULATOR
4495 4503
4496 #endif // V8_TARGET_ARCH_MIPS64 4504 #endif // V8_TARGET_ARCH_MIPS64
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