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Issue 1334793004: MIPS64: Add big-endian support for mips64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 3 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> 5 #include <limits.h>
6 #include <stdarg.h> 6 #include <stdarg.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 #include <cmath> 8 #include <cmath>
9 9
10 #if V8_TARGET_ARCH_MIPS64 10 #if V8_TARGET_ARCH_MIPS64
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1048 1048
1049 1049
1050 void Simulator::set_fpu_register(int fpureg, int64_t value) { 1050 void Simulator::set_fpu_register(int fpureg, int64_t value) {
1051 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1051 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1052 FPUregisters_[fpureg] = value; 1052 FPUregisters_[fpureg] = value;
1053 } 1053 }
1054 1054
1055 1055
1056 void Simulator::set_fpu_register_word(int fpureg, int32_t value) { 1056 void Simulator::set_fpu_register_word(int fpureg, int32_t value) {
1057 // Set ONLY lower 32-bits, leaving upper bits untouched. 1057 // Set ONLY lower 32-bits, leaving upper bits untouched.
1058 // TODO(plind): big endian issue.
1059 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1058 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1060 int32_t *pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]); 1059 int32_t* pword;
1060 if (kArchEndian == kLittle) {
1061 pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]);
1062 } else {
1063 pword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]) + 1;
1064 }
1061 *pword = value; 1065 *pword = value;
1062 } 1066 }
1063 1067
1064 1068
1065 void Simulator::set_fpu_register_hi_word(int fpureg, int32_t value) { 1069 void Simulator::set_fpu_register_hi_word(int fpureg, int32_t value) {
1066 // Set ONLY upper 32-bits, leaving lower bits untouched. 1070 // Set ONLY upper 32-bits, leaving lower bits untouched.
1067 // TODO(plind): big endian issue.
1068 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1071 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1069 int32_t *phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1; 1072 int32_t* phiword;
1073 if (kArchEndian == kLittle) {
1074 phiword = (reinterpret_cast<int32_t*>(&FPUregisters_[fpureg])) + 1;
1075 } else {
1076 phiword = reinterpret_cast<int32_t*>(&FPUregisters_[fpureg]);
1077 }
1070 *phiword = value; 1078 *phiword = value;
1071 } 1079 }
1072 1080
1073 1081
1074 void Simulator::set_fpu_register_float(int fpureg, float value) { 1082 void Simulator::set_fpu_register_float(int fpureg, float value) {
1075 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters)); 1083 DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
1076 *bit_cast<float*>(&FPUregisters_[fpureg]) = value; 1084 *bit_cast<float*>(&FPUregisters_[fpureg]) = value;
1077 } 1085 }
1078 1086
1079 1087
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4788 } 4796 }
4789 4797
4790 4798
4791 #undef UNSUPPORTED 4799 #undef UNSUPPORTED
4792 } // namespace internal 4800 } // namespace internal
4793 } // namespace v8 4801 } // namespace v8
4794 4802
4795 #endif // USE_SIMULATOR 4803 #endif // USE_SIMULATOR
4796 4804
4797 #endif // V8_TARGET_ARCH_MIPS64 4805 #endif // V8_TARGET_ARCH_MIPS64
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