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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 1334273002: [MIPS] Remove obsolete MacroAssembler::FlushICache. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Remove dead code. Created 5 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
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761 // RegList constant kSafepointSavedRegisters. 761 // RegList constant kSafepointSavedRegisters.
762 void PushSafepointRegisters(); 762 void PushSafepointRegisters();
763 void PopSafepointRegisters(); 763 void PopSafepointRegisters();
764 // Store value in register src in the safepoint stack slot for 764 // Store value in register src in the safepoint stack slot for
765 // register dst. 765 // register dst.
766 void StoreToSafepointRegisterSlot(Register src, Register dst); 766 void StoreToSafepointRegisterSlot(Register src, Register dst);
767 // Load the value of the src register from its safepoint stack slot 767 // Load the value of the src register from its safepoint stack slot
768 // into register dst. 768 // into register dst.
769 void LoadFromSafepointRegisterSlot(Register dst, Register src); 769 void LoadFromSafepointRegisterSlot(Register dst, Register src);
770 770
771 // Flush the I-cache from asm code. You should use CpuFeatures::FlushICache
772 // from C.
773 // Does not handle errors.
774 void FlushICache(Register address, unsigned instructions);
775
776 // MIPS32 R2 instruction macro. 771 // MIPS32 R2 instruction macro.
777 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 772 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
778 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 773 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
779 774
780 // --------------------------------------------------------------------------- 775 // ---------------------------------------------------------------------------
781 // FPU macros. These do not handle special cases like NaN or +- inf. 776 // FPU macros. These do not handle special cases like NaN or +- inf.
782 777
783 // Convert unsigned word to double. 778 // Convert unsigned word to double.
784 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch); 779 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
785 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch); 780 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
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1752 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1747 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1753 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1748 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1754 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1749 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1755 #else 1750 #else
1756 #define ACCESS_MASM(masm) masm-> 1751 #define ACCESS_MASM(masm) masm->
1757 #endif 1752 #endif
1758 1753
1759 } } // namespace v8::internal 1754 } } // namespace v8::internal
1760 1755
1761 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1756 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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