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| 1 | 1 |
| 2 // Copyright 2012 the V8 project authors. All rights reserved. | 2 // Copyright 2012 the V8 project authors. All rights reserved. |
| 3 // Use of this source code is governed by a BSD-style license that can be | 3 // Use of this source code is governed by a BSD-style license that can be |
| 4 // found in the LICENSE file. | 4 // found in the LICENSE file. |
| 5 | 5 |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_MIPS | 8 #if V8_TARGET_ARCH_MIPS |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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| 1213 for (int16_t i = kNumRegisters - 1; i >= 0; i--) { | 1213 for (int16_t i = kNumRegisters - 1; i >= 0; i--) { |
| 1214 if ((regs & (1 << i)) != 0) { | 1214 if ((regs & (1 << i)) != 0) { |
| 1215 ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset)); | 1215 ldc1(FPURegister::from_code(i), MemOperand(sp, stack_offset)); |
| 1216 stack_offset += kDoubleSize; | 1216 stack_offset += kDoubleSize; |
| 1217 } | 1217 } |
| 1218 } | 1218 } |
| 1219 addiu(sp, sp, stack_offset); | 1219 addiu(sp, sp, stack_offset); |
| 1220 } | 1220 } |
| 1221 | 1221 |
| 1222 | 1222 |
| 1223 void MacroAssembler::FlushICache(Register address, unsigned instructions) { | |
| 1224 RegList saved_regs = kJSCallerSaved | ra.bit(); | |
| 1225 MultiPush(saved_regs); | |
| 1226 AllowExternalCallThatCantCauseGC scope(this); | |
| 1227 | |
| 1228 Move(a0, address); | |
| 1229 PrepareCallCFunction(2, t8); | |
| 1230 | |
| 1231 li(a1, instructions * kInstrSize); | |
| 1232 CallCFunction(ExternalReference::flush_icache_function(isolate()), 2); | |
| 1233 MultiPop(saved_regs); | |
| 1234 } | |
| 1235 | |
| 1236 | |
| 1237 void MacroAssembler::Ext(Register rt, | 1223 void MacroAssembler::Ext(Register rt, |
| 1238 Register rs, | 1224 Register rs, |
| 1239 uint16_t pos, | 1225 uint16_t pos, |
| 1240 uint16_t size) { | 1226 uint16_t size) { |
| 1241 DCHECK(pos < 32); | 1227 DCHECK(pos < 32); |
| 1242 DCHECK(pos + size < 33); | 1228 DCHECK(pos + size < 33); |
| 1243 | 1229 |
| 1244 if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) { | 1230 if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) { |
| 1245 ext_(rt, rs, pos, size); | 1231 ext_(rt, rs, pos, size); |
| 1246 } else { | 1232 } else { |
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| 6013 if (mag.shift > 0) sra(result, result, mag.shift); | 5999 if (mag.shift > 0) sra(result, result, mag.shift); |
| 6014 srl(at, dividend, 31); | 6000 srl(at, dividend, 31); |
| 6015 Addu(result, result, Operand(at)); | 6001 Addu(result, result, Operand(at)); |
| 6016 } | 6002 } |
| 6017 | 6003 |
| 6018 | 6004 |
| 6019 } // namespace internal | 6005 } // namespace internal |
| 6020 } // namespace v8 | 6006 } // namespace v8 |
| 6021 | 6007 |
| 6022 #endif // V8_TARGET_ARCH_MIPS | 6008 #endif // V8_TARGET_ARCH_MIPS |
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