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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/longjump.h" | 9 #include "vm/longjump.h" |
10 #include "vm/runtime_entry.h" | 10 #include "vm/runtime_entry.h" |
11 #include "vm/simulator.h" | 11 #include "vm/simulator.h" |
12 #include "vm/stack_frame.h" | 12 #include "vm/stack_frame.h" |
13 #include "vm/stub_code.h" | 13 #include "vm/stub_code.h" |
14 | 14 |
15 namespace dart { | 15 namespace dart { |
16 | 16 |
17 #if defined(USING_SIMULATOR) | 17 #if defined(USING_SIMULATOR) |
18 DECLARE_FLAG(int, trace_sim_after); | 18 DECLARE_FLAG(int, trace_sim_after); |
19 #endif | 19 #endif |
| 20 DECLARE_FLAG(bool, allow_absolute_addresses); |
20 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message."); | 21 DEFINE_FLAG(bool, print_stop_message, false, "Print stop message."); |
21 DECLARE_FLAG(bool, inline_alloc); | 22 DECLARE_FLAG(bool, inline_alloc); |
22 | 23 |
23 void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) { | 24 void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) { |
24 ASSERT(Utils::IsAligned(data, 4)); | 25 ASSERT(Utils::IsAligned(data, 4)); |
25 ASSERT(Utils::IsAligned(length, 4)); | 26 ASSERT(Utils::IsAligned(length, 4)); |
26 const uword end = data + length; | 27 const uword end = data + length; |
27 while (data < end) { | 28 while (data < end) { |
28 *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction; | 29 *reinterpret_cast<int32_t*>(data) = Instr::kBreakPointInstruction; |
29 data += 4; | 30 data += 4; |
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512 // no constant pool is set up (e.g. intrinsic code). | 513 // no constant pool is set up (e.g. intrinsic code). |
513 if (Thread::CanLoadFromThread(object)) { | 514 if (Thread::CanLoadFromThread(object)) { |
514 lw(rd, Address(THR, Thread::OffsetFromThread(object))); | 515 lw(rd, Address(THR, Thread::OffsetFromThread(object))); |
515 return; | 516 return; |
516 } | 517 } |
517 ASSERT(!in_delay_slot_); | 518 ASSERT(!in_delay_slot_); |
518 // Smis and VM heap objects are never relocated; do not use object pool. | 519 // Smis and VM heap objects are never relocated; do not use object pool. |
519 if (object.IsSmi()) { | 520 if (object.IsSmi()) { |
520 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw())); | 521 LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw())); |
521 } else if (object.InVMHeap() || !constant_pool_allowed()) { | 522 } else if (object.InVMHeap() || !constant_pool_allowed()) { |
| 523 ASSERT(FLAG_allow_absolute_addresses); |
522 // Make sure that class CallPattern is able to decode this load immediate. | 524 // Make sure that class CallPattern is able to decode this load immediate. |
523 int32_t object_raw = reinterpret_cast<int32_t>(object.raw()); | 525 int32_t object_raw = reinterpret_cast<int32_t>(object.raw()); |
524 const uint16_t object_low = Utils::Low16Bits(object_raw); | 526 const uint16_t object_low = Utils::Low16Bits(object_raw); |
525 const uint16_t object_high = Utils::High16Bits(object_raw); | 527 const uint16_t object_high = Utils::High16Bits(object_raw); |
526 lui(rd, Immediate(object_high)); | 528 lui(rd, Immediate(object_high)); |
527 ori(rd, rd, Immediate(object_low)); | 529 ori(rd, rd, Immediate(object_low)); |
528 } else { | 530 } else { |
529 // Make sure that class CallPattern is able to decode this load from the | 531 // Make sure that class CallPattern is able to decode this load from the |
530 // object pool. | 532 // object pool. |
531 const int32_t offset = ObjectPool::element_offset( | 533 const int32_t offset = ObjectPool::element_offset( |
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861 Register temp_reg, | 863 Register temp_reg, |
862 Heap::Space space, | 864 Heap::Space space, |
863 bool inline_isolate) { | 865 bool inline_isolate) { |
864 ASSERT(!in_delay_slot_); | 866 ASSERT(!in_delay_slot_); |
865 ASSERT(temp_reg != kNoRegister); | 867 ASSERT(temp_reg != kNoRegister); |
866 ASSERT(temp_reg != TMP); | 868 ASSERT(temp_reg != TMP); |
867 ASSERT(cid > 0); | 869 ASSERT(cid > 0); |
868 intptr_t counter_offset = | 870 intptr_t counter_offset = |
869 ClassTable::CounterOffsetFor(cid, space == Heap::kNew); | 871 ClassTable::CounterOffsetFor(cid, space == Heap::kNew); |
870 if (inline_isolate) { | 872 if (inline_isolate) { |
| 873 ASSERT(FLAG_allow_absolute_addresses); |
871 ClassTable* class_table = Isolate::Current()->class_table(); | 874 ClassTable* class_table = Isolate::Current()->class_table(); |
872 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); | 875 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); |
873 if (cid < kNumPredefinedCids) { | 876 if (cid < kNumPredefinedCids) { |
874 LoadImmediate( | 877 LoadImmediate( |
875 temp_reg, reinterpret_cast<uword>(*table_ptr) + counter_offset); | 878 temp_reg, reinterpret_cast<uword>(*table_ptr) + counter_offset); |
876 } else { | 879 } else { |
877 ASSERT(temp_reg != kNoRegister); | 880 ASSERT(temp_reg != kNoRegister); |
878 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); | 881 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); |
879 lw(temp_reg, Address(temp_reg, 0)); | 882 lw(temp_reg, Address(temp_reg, 0)); |
880 AddImmediate(temp_reg, counter_offset); | 883 AddImmediate(temp_reg, counter_offset); |
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939 void Assembler::MaybeTraceAllocation(intptr_t cid, | 942 void Assembler::MaybeTraceAllocation(intptr_t cid, |
940 Register temp_reg, | 943 Register temp_reg, |
941 Label* trace, | 944 Label* trace, |
942 bool inline_isolate) { | 945 bool inline_isolate) { |
943 ASSERT(cid > 0); | 946 ASSERT(cid > 0); |
944 ASSERT(!in_delay_slot_); | 947 ASSERT(!in_delay_slot_); |
945 ASSERT(temp_reg != kNoRegister); | 948 ASSERT(temp_reg != kNoRegister); |
946 ASSERT(temp_reg != TMP); | 949 ASSERT(temp_reg != TMP); |
947 intptr_t state_offset = ClassTable::StateOffsetFor(cid); | 950 intptr_t state_offset = ClassTable::StateOffsetFor(cid); |
948 if (inline_isolate) { | 951 if (inline_isolate) { |
| 952 ASSERT(FLAG_allow_absolute_addresses); |
949 ClassTable* class_table = Isolate::Current()->class_table(); | 953 ClassTable* class_table = Isolate::Current()->class_table(); |
950 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); | 954 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); |
951 if (cid < kNumPredefinedCids) { | 955 if (cid < kNumPredefinedCids) { |
952 LoadImmediate(temp_reg, | 956 LoadImmediate(temp_reg, |
953 reinterpret_cast<uword>(*table_ptr) + state_offset); | 957 reinterpret_cast<uword>(*table_ptr) + state_offset); |
954 } else { | 958 } else { |
955 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); | 959 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr)); |
956 lw(temp_reg, Address(temp_reg, 0)); | 960 lw(temp_reg, Address(temp_reg, 0)); |
957 AddImmediate(temp_reg, state_offset); | 961 AddImmediate(temp_reg, state_offset); |
958 } | 962 } |
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1331 Label stop; | 1335 Label stop; |
1332 b(&stop); | 1336 b(&stop); |
1333 Emit(reinterpret_cast<int32_t>(message)); | 1337 Emit(reinterpret_cast<int32_t>(message)); |
1334 Bind(&stop); | 1338 Bind(&stop); |
1335 break_(Instr::kStopMessageCode); | 1339 break_(Instr::kStopMessageCode); |
1336 } | 1340 } |
1337 | 1341 |
1338 } // namespace dart | 1342 } // namespace dart |
1339 | 1343 |
1340 #endif // defined TARGET_ARCH_MIPS | 1344 #endif // defined TARGET_ARCH_MIPS |
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