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Side by Side Diff: src/x64/code-stubs-x64.h

Issue 1332283002: Make FlushICache part of Assembler(Base) and take Isolate as parameter. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix arm64 PatchingAssembler that initialized its isolate with NULL :) Created 5 years, 3 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_X64_CODE_STUBS_X64_H_ 5 #ifndef V8_X64_CODE_STUBS_X64_H_
6 #define V8_X64_CODE_STUBS_X64_H_ 6 #define V8_X64_CODE_STUBS_X64_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 10
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173 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY); 173 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
174 stub->instruction_start()[0] = kTwoByteJumpInstruction; 174 stub->instruction_start()[0] = kTwoByteJumpInstruction;
175 break; 175 break;
176 case INCREMENTAL_COMPACTION: 176 case INCREMENTAL_COMPACTION:
177 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY); 177 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
178 stub->instruction_start()[0] = kTwoByteNopInstruction; 178 stub->instruction_start()[0] = kTwoByteNopInstruction;
179 stub->instruction_start()[2] = kFiveByteJumpInstruction; 179 stub->instruction_start()[2] = kFiveByteJumpInstruction;
180 break; 180 break;
181 } 181 }
182 DCHECK(GetMode(stub) == mode); 182 DCHECK(GetMode(stub) == mode);
183 CpuFeatures::FlushICache(stub->instruction_start(), 7); 183 Assembler::FlushICache(stub->GetIsolate(), stub->instruction_start(), 7);
184 } 184 }
185 185
186 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR(); 186 DEFINE_NULL_CALL_INTERFACE_DESCRIPTOR();
187 187
188 private: 188 private:
189 // This is a helper class for freeing up 3 scratch registers, where the third 189 // This is a helper class for freeing up 3 scratch registers, where the third
190 // is always rcx (needed for shift operations). The input is two registers 190 // is always rcx (needed for shift operations). The input is two registers
191 // that must be preserved and one scratch register provided by the caller. 191 // that must be preserved and one scratch register provided by the caller.
192 class RegisterAllocation { 192 class RegisterAllocation {
193 public: 193 public:
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356 Label slow_; 356 Label slow_;
357 RegisterAllocation regs_; 357 RegisterAllocation regs_;
358 358
359 DISALLOW_COPY_AND_ASSIGN(RecordWriteStub); 359 DISALLOW_COPY_AND_ASSIGN(RecordWriteStub);
360 }; 360 };
361 361
362 362
363 } } // namespace v8::internal 363 } } // namespace v8::internal
364 364
365 #endif // V8_X64_CODE_STUBS_X64_H_ 365 #endif // V8_X64_CODE_STUBS_X64_H_
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