Implements int2fp, fp2int, and fp2fp conversions for ARM32.

tests_lit/llvm2ice_tests/fp.convert.ll

Index: tests_lit/llvm2ice_tests/fp.convert.ll
diff --git a/tests_lit/llvm2ice_tests/fp.convert.ll b/tests_lit/llvm2ice_tests/fp.convert.ll
index 907a498723baa5d0e38ad0c3cdd0dfab694183ba..1efe0d74fd87d3f3e742e0c010b1468195c72cc7 100644
--- a/tests_lit/llvm2ice_tests/fp.convert.ll
+++ b/tests_lit/llvm2ice_tests/fp.convert.ll
@@ -6,6 +6,10 @@
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s
 
+; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
+; RUN:   --target arm32 -i %s --args -Om1 --skip-unimplemented \
+; RUN:   | %if --need=target_ARM32 --command FileCheck %s --check-prefix=ARM32
+
 define internal float @fptrunc(double %a) {
 entry:
   %conv = fptrunc double %a to float
@@ -14,6 +18,8 @@ entry:
 ; CHECK-LABEL: fptrunc
 ; CHECK: cvtsd2ss
 ; CHECK: fld
+; ARM32-LABEL: fptrunc
+; ARM32: vcvt.f32.f64 {{s[0-9]+}}, {{d[0-9]+}}
 
 define internal double @fpext(float %a) {
 entry:
@@ -23,6 +29,8 @@ entry:
 ; CHECK-LABEL: fpext
 ; CHECK: cvtss2sd
 ; CHECK: fld
+; ARM32-LABEL: fpext
+; ARM32: vcvt.f64.f32 {{d[0-9]+}}, {{s[0-9]+}}
 
 define internal i64 @doubleToSigned64(double %a) {
 entry:
@@ -31,6 +39,8 @@ entry:
 }
 ; CHECK-LABEL: doubleToSigned64
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptosi_f64_i64
+; ARM32-LABEL: doubleToSigned64
+; TODO(jpp): implement this test.
 
 define internal i64 @floatToSigned64(float %a) {
 entry:
@@ -39,6 +49,8 @@ entry:
 }
 ; CHECK-LABEL: floatToSigned64
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptosi_f32_i64
+; ARM32-LABEL: floatToSigned64
+; TODO(jpp): implement this test.
 
 define internal i64 @doubleToUnsigned64(double %a) {
 entry:
@@ -47,6 +59,8 @@ entry:
 }
 ; CHECK-LABEL: doubleToUnsigned64
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f64_i64
+; ARM32-LABEL: doubleToUnsigned64
+; TODO(jpp): implement this test.
 
 define internal i64 @floatToUnsigned64(float %a) {
 entry:
@@ -55,6 +69,8 @@ entry:
 }
 ; CHECK-LABEL: floatToUnsigned64
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f32_i64
+; ARM32-LABEL: floatToUnsigned64
+; TODO(jpp): implement this test.
 
 define internal i32 @doubleToSigned32(double %a) {
 entry:
@@ -63,6 +79,9 @@ entry:
 }
 ; CHECK-LABEL: doubleToSigned32
 ; CHECK: cvttsd2si
+; ARM32-LABEL: doubleToSigned32
+; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
 
 define internal i32 @doubleToSigned32Const() {
 entry:
@@ -71,6 +90,12 @@ entry:
 }
 ; CHECK-LABEL: doubleToSigned32Const
 ; CHECK: cvttsd2si
+; ARM32-LABEL: doubleToSigned32Const
+; ARM32-DAG: movw [[ADDR:r[0-9]+]], #:lower16:.L$
+; ARM32-DAG: movt [[ADDR]], #:upper16:.L$
+; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]], #0{{\]}}
+; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]+]], [[DREG]]
+; ARM32-DAF: vmov {{r[0-9]+}}, [[REG]]
 
 define internal i32 @floatToSigned32(float %a) {
 entry:
@@ -79,6 +104,9 @@ entry:
 }
 ; CHECK-LABEL: floatToSigned32
 ; CHECK: cvttss2si
+; ARM32-LABEL: floatToSigned32
+; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]+]], {{s[0-9]+}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
 
 define internal i32 @doubleToUnsigned32(double %a) {
 entry:
@@ -87,6 +115,9 @@ entry:
 }
 ; CHECK-LABEL: doubleToUnsigned32
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f64_i32
+; ARM32-LABEL: doubleToUnsigned32
+; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]+]], {{d[0-9]+}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
 
 define internal i32 @floatToUnsigned32(float %a) {
 entry:
@@ -95,6 +126,9 @@ entry:
 }
 ; CHECK-LABEL: floatToUnsigned32
 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f32_i32
+; ARM32-LABEL: floatToUnsigned32
+; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]+]], {{s[0-9]+}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
 
 define internal i32 @doubleToSigned16(double %a) {
 entry:
@@ -105,6 +139,10 @@ entry:
 ; CHECK-LABEL: doubleToSigned16
 ; CHECK: cvttsd2si
 ; CHECK: movsx
+; ARM32-LABEL: doubleToSigned16
+; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: sxth
 
 define internal i32 @floatToSigned16(float %a) {
 entry:
@@ -115,6 +153,10 @@ entry:
 ; CHECK-LABEL: floatToSigned16
 ; CHECK: cvttss2si
 ; CHECK: movsx
+; ARM32-LABEL: floatToSigned16
+; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: sxth
 
 define internal i32 @doubleToUnsigned16(double %a) {
 entry:
@@ -125,6 +167,10 @@ entry:
 ; CHECK-LABEL: doubleToUnsigned16
 ; CHECK: cvttsd2si
 ; CHECK: movzx
+; ARM32-LABEL: doubleToUnsigned16
+; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: uxth
 
 define internal i32 @floatToUnsigned16(float %a) {
 entry:
@@ -135,6 +181,10 @@ entry:
 ; CHECK-LABEL: floatToUnsigned16
 ; CHECK: cvttss2si
 ; CHECK: movzx
+; ARM32-LABEL: floatToUnsigned16
+; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: uxth
 
 define internal i32 @doubleToSigned8(double %a) {
 entry:
@@ -145,6 +195,10 @@ entry:
 ; CHECK-LABEL: doubleToSigned8
 ; CHECK: cvttsd2si
 ; CHECK: movsx
+; ARM32-LABEL: doubleToSigned8
+; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: sxtb
 
 define internal i32 @floatToSigned8(float %a) {
 entry:
@@ -155,6 +209,10 @@ entry:
 ; CHECK-LABEL: floatToSigned8
 ; CHECK: cvttss2si
 ; CHECK: movsx
+; ARM32-LABEL: floatToSigned8
+; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: sxtb
 
 define internal i32 @doubleToUnsigned8(double %a) {
 entry:
@@ -165,6 +223,10 @@ entry:
 ; CHECK-LABEL: doubleToUnsigned8
 ; CHECK: cvttsd2si
 ; CHECK: movzx
+; ARM32-LABEL: doubleToUnsigned8
+; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: uxtb
 
 define internal i32 @floatToUnsigned8(float %a) {
 entry:
@@ -175,6 +237,10 @@ entry:
 ; CHECK-LABEL: floatToUnsigned8
 ; CHECK: cvttss2si
 ; CHECK: movzx
+; ARM32-LABEL: floatToUnsigned8
+; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
+; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]]
+; ARM32: uxtb
 
 define internal i32 @doubleToUnsigned1(double %a) {
 entry:
@@ -185,6 +251,12 @@ entry:
 ; CHECK-LABEL: doubleToUnsigned1
 ; CHECK: cvttsd2si
 ; CHECK: and eax,0x1
+; ARM32-LABEL: doubleToUnsigned1
+; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}}
+; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]]
+; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1
+; ARM32-NOT: uxth
+; ARM32-NOT: uxtb
 
 define internal i32 @floatToUnsigned1(float %a) {
 entry:
@@ -195,6 +267,12 @@ entry:
 ; CHECK-LABEL: floatToUnsigned1
 ; CHECK: cvttss2si
 ; CHECK: and eax,0x1
+; ARM32-LABEL: floatToUnsigned1
+; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}}
+; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]]
+; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1
+; ARM32-NOT: uxth
+; ARM32-NOT: uxtb
 
 define internal double @signed64ToDouble(i64 %a) {
 entry:
@@ -204,6 +282,8 @@ entry:
 ; CHECK-LABEL: signed64ToDouble
 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f64
 ; CHECK: fstp QWORD
+; ARM32-LABEL: signed64ToDouble
+; TODO(jpp): implement this test.
 
 define internal float @signed64ToFloat(i64 %a) {
 entry:
@@ -213,6 +293,8 @@ entry:
 ; CHECK-LABEL: signed64ToFloat
 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f32
 ; CHECK: fstp DWORD
+; ARM32-LABEL: signed64ToFloat
+; TODO(jpp): implement this test.
 
 define internal double @unsigned64ToDouble(i64 %a) {
 entry:
@@ -222,6 +304,8 @@ entry:
 ; CHECK-LABEL: unsigned64ToDouble
 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64
 ; CHECK: fstp
+; ARM32-LABEL: unsigned64ToDouble
+; TODO(jpp): implement this test.
 
 define internal float @unsigned64ToFloat(i64 %a) {
 entry:
@@ -231,17 +315,21 @@ entry:
 ; CHECK-LABEL: unsigned64ToFloat
 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f32
 ; CHECK: fstp
+; ARM32-LABEL: unsigned64ToFloat
+; TODO(jpp): implement this test.
 
 define internal double @unsigned64ToDoubleConst() {
 entry:
   %conv = uitofp i64 12345678901234 to double
   ret double %conv
 }
-; CHECK-LABEL: unsigned64ToDouble
+; CHECK-LABEL: unsigned64ToDoubleConst
 ; CHECK: mov DWORD PTR [esp+0x4],0xb3a
 ; CHECK: mov DWORD PTR [esp],0x73ce2ff2
 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64
 ; CHECK: fstp
+; ARM32-LABEL: unsigned64ToDoubleConst
+; TODO(jpp): implement this test.
 
 define internal double @signed32ToDouble(i32 %a) {
 entry:
@@ -251,6 +339,9 @@ entry:
 ; CHECK-LABEL: signed32ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: signed32ToDouble
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
+; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
 
 define internal double @signed32ToDoubleConst() {
 entry:
@@ -260,6 +351,10 @@ entry:
 ; CHECK-LABEL: signed32ToDoubleConst
 ; CHECK: cvtsi2sd {{.*[^1]}}
 ; CHECK: fld
+; ARM32-LABEL: signed32ToDoubleConst
+; ARM32-DAG: movw [[CONST:r[0-9]+]], #123
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[CONST]]
+; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @signed32ToFloat(i32 %a) {
 entry:
@@ -269,6 +364,9 @@ entry:
 ; CHECK-LABEL: signed32ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld
+; ARM32-LABEL: signed32ToFloat
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
+; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @unsigned32ToDouble(i32 %a) {
 entry:
@@ -278,6 +376,9 @@ entry:
 ; CHECK-LABEL: unsigned32ToDouble
 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f64
 ; CHECK: fstp QWORD
+; ARM32-LABEL: unsigned32ToDouble
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
+; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @unsigned32ToFloat(i32 %a) {
 entry:
@@ -287,6 +388,9 @@ entry:
 ; CHECK-LABEL: unsigned32ToFloat
 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f32
 ; CHECK: fstp DWORD
+; ARM32-LABEL: unsigned32ToFloat
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}}
+; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @signed16ToDouble(i32 %a) {
 entry:
@@ -297,6 +401,10 @@ entry:
 ; CHECK-LABEL: signed16ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld QWORD
+; ARM32-LABEL: signed16ToDouble
+; ARM32-DAG: sxth [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @signed16ToFloat(i32 %a) {
 entry:
@@ -307,6 +415,10 @@ entry:
 ; CHECK-LABEL: signed16ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld DWORD
+; ARM32-LABEL: signed16ToFloat
+; ARM32-DAG: sxth [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @unsigned16ToDouble(i32 %a) {
 entry:
@@ -317,6 +429,10 @@ entry:
 ; CHECK-LABEL: unsigned16ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: unsigned16ToDouble
+; ARM32-DAG: uxth [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
 
 define internal double @unsigned16ToDoubleConst() {
 entry:
@@ -326,6 +442,11 @@ entry:
 ; CHECK-LABEL: unsigned16ToDoubleConst
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: unsigned16ToDoubleConst
+; ARM32-DAG: movw [[INT:r[0-9]+]], #12345
+; ARM32-DAG: uxth [[INT]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @unsigned16ToFloat(i32 %a) {
 entry:
@@ -336,6 +457,10 @@ entry:
 ; CHECK-LABEL: unsigned16ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld
+; ARM32-LABEL: unsigned16ToFloat
+; ARM32-DAG: uxth [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @signed8ToDouble(i32 %a) {
 entry:
@@ -346,6 +471,10 @@ entry:
 ; CHECK-LABEL: signed8ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: signed8ToDouble
+; ARM32-DAG: sxtb [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @signed8ToFloat(i32 %a) {
 entry:
@@ -356,6 +485,10 @@ entry:
 ; CHECK-LABEL: signed8ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld
+; ARM32-LABEL: signed8ToFloat
+; ARM32-DAG: sxtb [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @unsigned8ToDouble(i32 %a) {
 entry:
@@ -366,6 +499,10 @@ entry:
 ; CHECK-LABEL: unsigned8ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: unsigned8ToDouble
+; ARM32-DAG: uxtb [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @unsigned8ToFloat(i32 %a) {
 entry:
@@ -376,6 +513,10 @@ entry:
 ; CHECK-LABEL: unsigned8ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld
+; ARM32-LABEL: unsigned8ToFloat
+; ARM32-DAG: uxtb [[INT:r[0-9]+]]
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
 
 define internal double @unsigned1ToDouble(i32 %a) {
 entry:
@@ -386,6 +527,10 @@ entry:
 ; CHECK-LABEL: unsigned1ToDouble
 ; CHECK: cvtsi2sd
 ; CHECK: fld
+; ARM32-LABEL: unsigned1ToDouble
+; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]]
 
 define internal float @unsigned1ToFloat(i32 %a) {
 entry:
@@ -396,6 +541,10 @@ entry:
 ; CHECK-LABEL: unsigned1ToFloat
 ; CHECK: cvtsi2ss
 ; CHECK: fld
+; ARM32-LABEL: unsigned1ToFloat
+; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1
+; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]]
+; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]]
 
 define internal float @int32BitcastToFloat(i32 %a) {
 entry:
@@ -404,6 +553,8 @@ entry:
 }
 ; CHECK-LABEL: int32BitcastToFloat
 ; CHECK: mov
+; ARM32-LABEL: int32BitcastToFloat
+; TODO(jpp): implement this test.
 
 define internal float @int32BitcastToFloatConst() {
 entry:
@@ -412,6 +563,8 @@ entry:
 }
 ; CHECK-LABEL: int32BitcastToFloatConst
 ; CHECK: mov
+; ARM32-LABEL: int32BitcastToFloatConst
+; TODO(jpp): implement this test.
 
 define internal double @int64BitcastToDouble(i64 %a) {
 entry:
@@ -420,6 +573,8 @@ entry:
 }
 ; CHECK-LABEL: int64BitcastToDouble
 ; CHECK: mov
+; ARM32-LABEL: int64BitcastToDouble
+; TODO(jpp): implement this test.
 
 define internal double @int64BitcastToDoubleConst() {
 entry:
@@ -428,3 +583,6 @@ entry:
 }
 ; CHECK-LABEL: int64BitcastToDoubleConst
 ; CHECK: mov
+; ARM32-LABEL: int64BitcastToDoubleConst
+; TODO(jpp): implement this test.
+