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Issue 1330033002: [calls] Consistent call protocol for calls. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Add arm64, mips and mips64 ports. Created 5 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #if V8_TARGET_ARCH_ARM 7 #if V8_TARGET_ARCH_ARM
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h" 10 #include "src/base/division-by-constant.h"
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1244 1244
1245 // The code below is made a lot easier because the calling code already sets 1245 // The code below is made a lot easier because the calling code already sets
1246 // up actual and expected registers according to the contract if values are 1246 // up actual and expected registers according to the contract if values are
1247 // passed in registers. 1247 // passed in registers.
1248 DCHECK(actual.is_immediate() || actual.reg().is(r0)); 1248 DCHECK(actual.is_immediate() || actual.reg().is(r0));
1249 DCHECK(expected.is_immediate() || expected.reg().is(r2)); 1249 DCHECK(expected.is_immediate() || expected.reg().is(r2));
1250 DCHECK((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3)); 1250 DCHECK((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3));
1251 1251
1252 if (expected.is_immediate()) { 1252 if (expected.is_immediate()) {
1253 DCHECK(actual.is_immediate()); 1253 DCHECK(actual.is_immediate());
1254 mov(r0, Operand(actual.immediate()));
1254 if (expected.immediate() == actual.immediate()) { 1255 if (expected.immediate() == actual.immediate()) {
1255 definitely_matches = true; 1256 definitely_matches = true;
1256 } else { 1257 } else {
1257 mov(r0, Operand(actual.immediate()));
1258 const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel; 1258 const int sentinel = SharedFunctionInfo::kDontAdaptArgumentsSentinel;
1259 if (expected.immediate() == sentinel) { 1259 if (expected.immediate() == sentinel) {
1260 // Don't worry about adapting arguments for builtins that 1260 // Don't worry about adapting arguments for builtins that
1261 // don't want that done. Skip adaption code by making it look 1261 // don't want that done. Skip adaption code by making it look
1262 // like we have a match between expected and actual number of 1262 // like we have a match between expected and actual number of
1263 // arguments. 1263 // arguments.
1264 definitely_matches = true; 1264 definitely_matches = true;
1265 } else { 1265 } else {
1266 *definitely_mismatches = true; 1266 *definitely_mismatches = true;
1267 mov(r2, Operand(expected.immediate())); 1267 mov(r2, Operand(expected.immediate()));
1268 } 1268 }
1269 } 1269 }
1270 } else { 1270 } else {
1271 if (actual.is_immediate()) { 1271 if (actual.is_immediate()) {
1272 mov(r0, Operand(actual.immediate()));
1272 cmp(expected.reg(), Operand(actual.immediate())); 1273 cmp(expected.reg(), Operand(actual.immediate()));
1273 b(eq, &regular_invoke); 1274 b(eq, &regular_invoke);
1274 mov(r0, Operand(actual.immediate()));
1275 } else { 1275 } else {
1276 cmp(expected.reg(), Operand(actual.reg())); 1276 cmp(expected.reg(), Operand(actual.reg()));
1277 b(eq, &regular_invoke); 1277 b(eq, &regular_invoke);
1278 } 1278 }
1279 } 1279 }
1280 1280
1281 if (!definitely_matches) { 1281 if (!definitely_matches) {
1282 if (!code_constant.is_null()) { 1282 if (!code_constant.is_null()) {
1283 mov(r3, Operand(code_constant)); 1283 mov(r3, Operand(code_constant));
1284 add(r3, r3, Operand(Code::kHeaderSize - kHeapObjectTag)); 1284 add(r3, r3, Operand(Code::kHeaderSize - kHeapObjectTag));
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3792 } 3792 }
3793 } 3793 }
3794 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); 3794 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift));
3795 add(result, result, Operand(dividend, LSR, 31)); 3795 add(result, result, Operand(dividend, LSR, 31));
3796 } 3796 }
3797 3797
3798 } // namespace internal 3798 } // namespace internal
3799 } // namespace v8 3799 } // namespace v8
3800 3800
3801 #endif // V8_TARGET_ARCH_ARM 3801 #endif // V8_TARGET_ARCH_ARM
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