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Issue 1328603003: Vector ICs: platform support for vector-based stores. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: mips build fixes. Created 5 years, 3 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_IA32 5 #if V8_TARGET_ARCH_IA32
6 6
7 #include "src/codegen.h" 7 #include "src/codegen.h"
8 #include "src/ic/ic.h" 8 #include "src/ic/ic.h"
9 #include "src/ic/stub-cache.h" 9 #include "src/ic/stub-cache.h"
10 #include "src/interface-descriptors.h" 10 #include "src/interface-descriptors.h"
11 11
12 namespace v8 { 12 namespace v8 {
13 namespace internal { 13 namespace internal {
14 14
15 #define __ ACCESS_MASM(masm) 15 #define __ ACCESS_MASM(masm)
16 16
17 17
18 static void ProbeTable(Isolate* isolate, MacroAssembler* masm, 18 static void ProbeTable(Isolate* isolate, MacroAssembler* masm,
19 Code::Kind ic_kind, Code::Flags flags, 19 Code::Kind ic_kind, Code::Flags flags,
20 StubCache::Table table, Register name, Register receiver, 20 StubCache::Table table, Register name, Register receiver,
21 // Number of the cache entry pointer-size scaled. 21 // Number of the cache entry pointer-size scaled.
22 Register offset, Register extra) { 22 Register offset, Register extra) {
23 ExternalReference key_offset(isolate->stub_cache()->key_reference(table)); 23 ExternalReference key_offset(isolate->stub_cache()->key_reference(table));
24 ExternalReference value_offset(isolate->stub_cache()->value_reference(table)); 24 ExternalReference value_offset(isolate->stub_cache()->value_reference(table));
25 ExternalReference map_offset(isolate->stub_cache()->map_reference(table)); 25 ExternalReference map_offset(isolate->stub_cache()->map_reference(table));
26 26
27 Label miss; 27 Label miss;
28 bool is_vector_store =
29 IC::ICUseVector(ic_kind) &&
30 (ic_kind == Code::STORE_IC || ic_kind == Code::KEYED_STORE_IC);
28 31
29 // Multiply by 3 because there are 3 fields per entry (name, code, map). 32 // Multiply by 3 because there are 3 fields per entry (name, code, map).
30 __ lea(offset, Operand(offset, offset, times_2, 0)); 33 __ lea(offset, Operand(offset, offset, times_2, 0));
31 34
32 if (extra.is_valid()) { 35 if (extra.is_valid()) {
33 // Get the code entry from the cache. 36 // Get the code entry from the cache.
34 __ mov(extra, Operand::StaticArray(offset, times_1, value_offset)); 37 __ mov(extra, Operand::StaticArray(offset, times_1, value_offset));
35 38
36 // Check that the key in the entry matches the name. 39 // Check that the key in the entry matches the name.
37 __ cmp(name, Operand::StaticArray(offset, times_1, key_offset)); 40 __ cmp(name, Operand::StaticArray(offset, times_1, key_offset));
(...skipping 11 matching lines...) Expand all
49 __ j(not_equal, &miss); 52 __ j(not_equal, &miss);
50 53
51 #ifdef DEBUG 54 #ifdef DEBUG
52 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) { 55 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) {
53 __ jmp(&miss); 56 __ jmp(&miss);
54 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) { 57 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
55 __ jmp(&miss); 58 __ jmp(&miss);
56 } 59 }
57 #endif 60 #endif
58 61
59 if (IC::ICUseVector(ic_kind)) { 62 // The vector and slot were pushed onto the stack before starting the
60 // The vector and slot were pushed onto the stack before starting the 63 // probe, and need to be dropped before calling the handler.
61 // probe, and need to be dropped before calling the handler. 64 if (is_vector_store) {
65 // The overlap here is rather embarrassing. One does what one must.
66 Register vector = VectorStoreICDescriptor::VectorRegister();
67 DCHECK(extra.is(VectorStoreICDescriptor::SlotRegister()));
68 __ add(extra, Immediate(Code::kHeaderSize - kHeapObjectTag));
69 __ pop(vector);
70 __ xchg(extra, Operand(esp, 0));
71 // Jump to the first instruction in the code stub.
72 __ ret(0);
73 } else {
62 __ pop(LoadWithVectorDescriptor::VectorRegister()); 74 __ pop(LoadWithVectorDescriptor::VectorRegister());
63 __ pop(LoadDescriptor::SlotRegister()); 75 __ pop(LoadDescriptor::SlotRegister());
76 __ add(extra, Immediate(Code::kHeaderSize - kHeapObjectTag));
77 __ jmp(extra);
64 } 78 }
65 79
66 // Jump to the first instruction in the code stub.
67 __ add(extra, Immediate(Code::kHeaderSize - kHeapObjectTag));
68 __ jmp(extra);
69
70 __ bind(&miss); 80 __ bind(&miss);
71 } else { 81 } else {
82 DCHECK(ic_kind == Code::STORE_IC || ic_kind == Code::KEYED_STORE_IC);
83
72 // Save the offset on the stack. 84 // Save the offset on the stack.
73 __ push(offset); 85 __ push(offset);
74 86
75 // Check that the key in the entry matches the name. 87 // Check that the key in the entry matches the name.
76 __ cmp(name, Operand::StaticArray(offset, times_1, key_offset)); 88 __ cmp(name, Operand::StaticArray(offset, times_1, key_offset));
77 __ j(not_equal, &miss); 89 __ j(not_equal, &miss);
78 90
79 // Check the map matches. 91 // Check the map matches.
80 __ mov(offset, Operand::StaticArray(offset, times_1, map_offset)); 92 __ mov(offset, Operand::StaticArray(offset, times_1, map_offset));
81 __ cmp(offset, FieldOperand(receiver, HeapObject::kMapOffset)); 93 __ cmp(offset, FieldOperand(receiver, HeapObject::kMapOffset));
(...skipping 16 matching lines...) Expand all
98 __ jmp(&miss); 110 __ jmp(&miss);
99 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) { 111 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) {
100 __ jmp(&miss); 112 __ jmp(&miss);
101 } 113 }
102 #endif 114 #endif
103 115
104 // Restore offset and re-load code entry from cache. 116 // Restore offset and re-load code entry from cache.
105 __ pop(offset); 117 __ pop(offset);
106 __ mov(offset, Operand::StaticArray(offset, times_1, value_offset)); 118 __ mov(offset, Operand::StaticArray(offset, times_1, value_offset));
107 119
108 if (IC::ICUseVector(ic_kind)) { 120 // Jump to the first instruction in the code stub.
121 if (is_vector_store) {
109 // The vector and slot were pushed onto the stack before starting the 122 // The vector and slot were pushed onto the stack before starting the
110 // probe, and need to be dropped before calling the handler. 123 // probe, and need to be dropped before calling the handler.
111 Register vector = LoadWithVectorDescriptor::VectorRegister(); 124 Register vector = VectorStoreICDescriptor::VectorRegister();
112 Register slot = LoadDescriptor::SlotRegister(); 125 DCHECK(offset.is(VectorStoreICDescriptor::SlotRegister()));
113 DCHECK(!offset.is(vector) && !offset.is(slot)); 126 __ add(offset, Immediate(Code::kHeaderSize - kHeapObjectTag));
114
115 __ pop(vector); 127 __ pop(vector);
116 __ pop(slot); 128 __ xchg(offset, Operand(esp, 0));
129 __ ret(0);
130 } else {
131 __ add(offset, Immediate(Code::kHeaderSize - kHeapObjectTag));
132 __ jmp(offset);
117 } 133 }
118 134
119 // Jump to the first instruction in the code stub.
120 __ add(offset, Immediate(Code::kHeaderSize - kHeapObjectTag));
121 __ jmp(offset);
122
123 // Pop at miss. 135 // Pop at miss.
124 __ bind(&miss); 136 __ bind(&miss);
125 __ pop(offset); 137 __ pop(offset);
126 } 138 }
127 } 139 }
128 140
129 141
130 void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind, 142 void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind,
131 Code::Flags flags, Register receiver, 143 Code::Flags flags, Register receiver,
132 Register name, Register scratch, Register extra, 144 Register name, Register scratch, Register extra,
(...skipping 61 matching lines...) Expand 10 before | Expand all | Expand 10 after
194 __ bind(&miss); 206 __ bind(&miss);
195 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1); 207 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1);
196 } 208 }
197 209
198 210
199 #undef __ 211 #undef __
200 } // namespace internal 212 } // namespace internal
201 } // namespace v8 213 } // namespace v8
202 214
203 #endif // V8_TARGET_ARCH_IA32 215 #endif // V8_TARGET_ARCH_IA32
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