Refactor Lo and Hi out of Variable.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 510 matching lines @@
   Context.setInsertPoint(Context.getCur());
 
   for (SizeT I = 0, E = Args.size(); I < E; ++I) {
     Variable *Arg = Args[I];
     Type Ty = Arg->getType();
     if (Ty == IceType_i64) {
       std::pair<int32_t, int32_t> RegPair;
       if (!CC.I64InRegs(&RegPair))
         continue;
       Variable *RegisterArg = Func->makeVariable(Ty);
-      Variable *RegisterLo = Func->makeVariable(IceType_i32);
-      Variable *RegisterHi = Func->makeVariable(IceType_i32);
-      if (BuildDefs::dump()) {
-        RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func));
-        RegisterLo->setName(Func, "home_reg_lo:" + Arg->getName(Func));
-        RegisterHi->setName(Func, "home_reg_hi:" + Arg->getName(Func));
-      }
-      RegisterLo->setRegNum(RegPair.first);
-      RegisterLo->setIsArg();
-      RegisterHi->setRegNum(RegPair.second);
-      RegisterHi->setIsArg();
-      RegisterArg->setLoHi(RegisterLo, RegisterHi);
-      RegisterArg->setIsArg();
+      auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg);
+      if (BuildDefs::dump())
+        RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName(Func));
+      RegisterArg64On32->initHiLo(Func);
+      RegisterArg64On32->setIsArg();
+      RegisterArg64On32->getLo()->setRegNum(RegPair.first);
+      RegisterArg64On32->getHi()->setRegNum(RegPair.second);
       Arg->setIsArg(false);
 
-      Args[I] = RegisterArg;
+      Args[I] = RegisterArg64On32;
       Context.insert(InstAssign::create(Func, Arg, RegisterArg));
       continue;
     } else {
       int32_t RegNum;
       if (isVectorType(Ty) || isFloatingType(Ty)) {
         if (!CC.FPInReg(Ty, &RegNum))
           continue;
       } else {
         assert(Ty == IceType_i32);
         if (!CC.I32InReg(&RegNum))
@@ skipping 18 matching lines @@
 //
 // This assumes Arg is an argument passed on the stack. This sets the frame
 // offset for Arg and updates InArgsSizeBytes according to Arg's width. For an
 // I64 arg that has been split into Lo and Hi components, it calls itself
 // recursively on the components, taking care to handle Lo first because of the
 // little-endian architecture. Lastly, this function generates an instruction
 // to copy Arg into its assigned register if applicable.
 void TargetARM32::finishArgumentLowering(Variable *Arg, Variable *FramePtr,
                                          size_t BasicFrameOffset,
                                          size_t &InArgsSizeBytes) {
-  Variable *Lo = Arg->getLo();
-  Variable *Hi = Arg->getHi();
-  Type Ty = Arg->getType();
-  if (Lo && Hi && Ty == IceType_i64) {
-    assert(Lo->getType() != IceType_i64); // don't want infinite recursion
-    assert(Hi->getType() != IceType_i64); // don't want infinite recursion
+  if (auto *Arg64On32 = llvm::dyn_cast<Variable64On32>(Arg)) {
+    Variable *Lo = Arg64On32->getLo();
+    Variable *Hi = Arg64On32->getHi();
     finishArgumentLowering(Lo, FramePtr, BasicFrameOffset, InArgsSizeBytes);
     finishArgumentLowering(Hi, FramePtr, BasicFrameOffset, InArgsSizeBytes);
     return;
   }
+  Type Ty = Arg->getType();
   InArgsSizeBytes = applyStackAlignmentTy(InArgsSizeBytes, Ty);
   Arg->setStackOffset(BasicFrameOffset + InArgsSizeBytes);
   InArgsSizeBytes += typeWidthInBytesOnStack(Ty);
   // If the argument variable has been assigned a register, we need to load the
   // value from the stack slot.
   if (Arg->hasReg()) {
     assert(Ty != IceType_i64);
     OperandARM32Mem *Mem = OperandARM32Mem::create(
         Func, Ty, FramePtr, llvm::cast<ConstantInteger32>(
                                 Ctx->getConstantInt32(Arg->getStackOffset())));
@@ skipping 440 matching lines @@
           MovInst->setDeleted();
           NewBaseReg = LegalVar;
           NewBaseOffset = Offset;
           continue;
         }
       }
     }
   }
 }
 
-void TargetARM32::split64(Variable *Var) {
-  assert(Var->getType() == IceType_i64);
-  Variable *Lo = Var->getLo();
-  Variable *Hi = Var->getHi();
-  if (Lo) {
-    assert(Hi);
-    return;
-  }
-  assert(Hi == nullptr);
-  Lo = Func->makeVariable(IceType_i32);
-  Hi = Func->makeVariable(IceType_i32);
-  if (BuildDefs::dump()) {
-    Lo->setName(Func, Var->getName(Func) + "__lo");
-    Hi->setName(Func, Var->getName(Func) + "__hi");
-  }
-  Var->setLoHi(Lo, Hi);
-  if (Var->getIsArg()) {
-    Lo->setIsArg();
-    Hi->setIsArg();
-  }
-}
-
 Operand *TargetARM32::loOperand(Operand *Operand) {
   assert(Operand->getType() == IceType_i64);
   if (Operand->getType() != IceType_i64)
     return Operand;
-  if (auto *Var = llvm::dyn_cast<Variable>(Operand)) {
-    split64(Var);
-    return Var->getLo();
-  }
-  if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
+  if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
+    return Var64On32->getLo();
+  if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand))
     return Ctx->getConstantInt32(static_cast<uint32_t>(Const->getValue()));
-  }
   if (auto *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand)) {
     // Conservatively disallow memory operands with side-effects (pre/post
     // increment) in case of duplication.
     assert(Mem->getAddrMode() == OperandARM32Mem::Offset ||
            Mem->getAddrMode() == OperandARM32Mem::NegOffset);
     if (Mem->isRegReg()) {
       return OperandARM32Mem::create(Func, IceType_i32, Mem->getBase(),
                                      Mem->getIndex(), Mem->getShiftOp(),
                                      Mem->getShiftAmt(), Mem->getAddrMode());
     } else {
       return OperandARM32Mem::create(Func, IceType_i32, Mem->getBase(),
                                      Mem->getOffset(), Mem->getAddrMode());
     }
   }
   llvm_unreachable("Unsupported operand type");
   return nullptr;
 }
 
 Operand *TargetARM32::hiOperand(Operand *Operand) {
   assert(Operand->getType() == IceType_i64);
   if (Operand->getType() != IceType_i64)
     return Operand;
-  if (auto *Var = llvm::dyn_cast<Variable>(Operand)) {
-    split64(Var);
-    return Var->getHi();
-  }
+  if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
+    return Var64On32->getHi();
   if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
     return Ctx->getConstantInt32(
         static_cast<uint32_t>(Const->getValue() >> 32));
   }
   if (auto *Mem = llvm::dyn_cast<OperandARM32Mem>(Operand)) {
     // Conservatively disallow memory operands with side-effects in case of
     // duplication.
     assert(Mem->getAddrMode() == OperandARM32Mem::Offset ||
            Mem->getAddrMode() == OperandARM32Mem::NegOffset);
     const Type SplitType = IceType_i32;
@@ skipping 804 matching lines @@
     Inst *FakeUse = InstFakeUse::create(Func, ReturnReg);
     Context.insert(FakeUse);
   }
 
   if (!Dest)
     return;
 
   // Assign the result of the call to Dest.
   if (ReturnReg) {
     if (ReturnRegHi) {
-      assert(Dest->getType() == IceType_i64);
-      split64(Dest);
-      Variable *DestLo = Dest->getLo();
-      Variable *DestHi = Dest->getHi();
+      auto *Dest64On32 = llvm::cast<Variable64On32>(Dest);
+      Variable *DestLo = Dest64On32->getLo();
+      Variable *DestHi = Dest64On32->getHi();
       _mov(DestLo, ReturnReg);
       _mov(DestHi, ReturnRegHi);
     } else {
       if (isFloatingType(Dest->getType()) || isVectorType(Dest->getType())) {
         _vmov(Dest, ReturnReg);
       } else {
         assert(isIntegerType(Dest->getType()) &&
                typeWidthInBytes(Dest->getType()) <= 4);
         _mov(Dest, ReturnReg);
       }
@@ skipping 144 matching lines @@
     //     t1.fp = vcvt src0.fp
     //     t2.i32 = vmov t1.fp
     //     dest.int = conv t2.i32     @ Truncates the result if needed.
     // fptoui:
     //     t1.fp = vcvt src0.fp
     //     t2.u32 = vmov t1.fp
     //     dest.uint = conv t2.u32    @ Truncates the result if needed.
     if (isVectorType(Dest->getType())) {
       UnimplementedError(Func->getContext()->getFlags());
       break;
-    } else if (Dest->getType() == IceType_i64) {
-      split64(Dest);
-      Context.insert(InstFakeDef::create(Func, Dest->getLo()));
-      Context.insert(InstFakeDef::create(Func, Dest->getHi()));
+    }
+    if (auto *Dest64On32 = llvm::dyn_cast<Variable64On32>(Dest)) {
+      Context.insert(InstFakeDef::create(Func, Dest64On32->getLo()));
+      Context.insert(InstFakeDef::create(Func, Dest64On32->getHi()));
       UnimplementedError(Func->getContext()->getFlags());
       break;
     }
     const bool DestIsSigned = CastKind == InstCast::Fptosi;
     Variable *Src0R = legalizeToReg(Src0);
     Variable *T_fp = makeReg(IceType_f32);
     if (isFloat32Asserting32Or64(Src0->getType())) {
       _vcvt(T_fp, Src0R,
             DestIsSigned ? InstARM32Vcvt::S2si : InstARM32Vcvt::S2ui);
     } else {
@@ skipping 86 matching lines @@
       break;
     }
     case IceType_i64: {
       // t0, t1 <- src0
       // dest[31..0]  = t0
       // dest[63..32] = t1
       assert(Src0->getType() == IceType_f64);
       Variable *T0 = makeReg(IceType_i32);
       Variable *T1 = makeReg(IceType_i32);
       Variable *Src0R = legalizeToReg(Src0);
-      split64(Dest);
       _vmov(InstARM32Vmov::RegisterPair(T0, T1), Src0R);
-      lowerAssign(InstAssign::create(Func, Dest->getLo(), T0));
-      lowerAssign(InstAssign::create(Func, Dest->getHi(), T1));
+      auto *Dest64On32 = llvm::cast<Variable64On32>(Dest);
+      lowerAssign(InstAssign::create(Func, Dest64On32->getLo(), T0));
+      lowerAssign(InstAssign::create(Func, Dest64On32->getHi(), T1));
       break;
     }
     case IceType_f64: {
       // T0 <- lo(src)
       // T1 <- hi(src)
       // vmov T2, T0, T1
       // Dest <- T2
       assert(Src0->getType() == IceType_i64);
       Variable *SrcLo = legalizeToReg(loOperand(Src0));
       Variable *SrcHi = legalizeToReg(hiOperand(Src0));
@@ skipping 973 matching lines @@
       << ".eabi_attribute 68, 1   @ Tag_Virtualization_use\n";
   if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) {
     Str << ".eabi_attribute 44, 2   @ Tag_DIV_use\n";
   }
   // Technically R9 is used for TLS with Sandboxing, and we reserve it.
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 } // end of namespace Ice