Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(283)

Side by Side Diff: src/IceCfgNode.cpp

Issue 1323693002: Subzero: Provide a macro for iterating over instruction variables. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: "Addresses comments" Created 5 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceCfg.cpp ('k') | src/IceInst.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===// 1 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// This file implements the CfgNode class, including the complexities 11 /// This file implements the CfgNode class, including the complexities
12 /// of instruction insertion and in-edge calculation. 12 /// of instruction insertion and in-edge calculation.
13 /// 13 ///
14 //===----------------------------------------------------------------------===// 14 //===----------------------------------------------------------------------===//
15 15
16 #include "IceCfgNode.h" 16 #include "IceCfgNode.h"
17 17
18 #include "IceAssembler.h" 18 #include "IceAssembler.h"
19 #include "IceCfg.h" 19 #include "IceCfg.h"
20 #include "IceGlobalInits.h" 20 #include "IceGlobalInits.h"
21 #include "IceInst.h" 21 #include "IceInst.h"
22 #include "IceInstVarIter.h"
22 #include "IceLiveness.h" 23 #include "IceLiveness.h"
23 #include "IceOperand.h" 24 #include "IceOperand.h"
24 #include "IceTargetLowering.h" 25 #include "IceTargetLowering.h"
25 26
26 namespace Ice { 27 namespace Ice {
27 28
28 CfgNode::CfgNode(Cfg *Func, SizeT LabelNumber) 29 CfgNode::CfgNode(Cfg *Func, SizeT LabelNumber)
29 : Func(Func), Number(LabelNumber) {} 30 : Func(Func), Number(LabelNumber) {}
30 31
31 // Returns the name the node was created with. If no name was given, 32 // Returns the name the node was created with. If no name was given,
(...skipping 807 matching lines...) Expand 10 before | Expand all | Expand 10 after
839 return; 840 return;
840 bool First = true; 841 bool First = true;
841 Variable *Dest = Instr->getDest(); 842 Variable *Dest = Instr->getDest();
842 // Normally we increment the live count for the dest register. But 843 // Normally we increment the live count for the dest register. But
843 // we shouldn't if the instruction's IsDestNonKillable flag is set, 844 // we shouldn't if the instruction's IsDestNonKillable flag is set,
844 // because this means that the target lowering created this 845 // because this means that the target lowering created this
845 // instruction as a non-SSA assignment; i.e., a different, previous 846 // instruction as a non-SSA assignment; i.e., a different, previous
846 // instruction started the dest variable's live range. 847 // instruction started the dest variable's live range.
847 if (!Instr->isDestNonKillable() && Dest && Dest->hasReg()) 848 if (!Instr->isDestNonKillable() && Dest && Dest->hasReg())
848 ++LiveRegCount[Dest->getRegNum()]; 849 ++LiveRegCount[Dest->getRegNum()];
849 for (SizeT I = 0; I < Instr->getSrcSize(); ++I) { 850 FOREACH_VAR_IN_INST(Var, *Instr) {
850 Operand *Src = Instr->getSrc(I); 851 bool ShouldReport = Instr->isLastUse(Var);
851 SizeT NumVars = Src->getNumVars(); 852 if (ShouldReport && Var->hasReg()) {
852 for (SizeT J = 0; J < NumVars; ++J) { 853 // Don't report end of live range until the live count reaches 0.
853 const Variable *Var = Src->getVar(J); 854 SizeT NewCount = --LiveRegCount[Var->getRegNum()];
854 bool ShouldReport = Instr->isLastUse(Var); 855 if (NewCount)
855 if (ShouldReport && Var->hasReg()) { 856 ShouldReport = false;
856 // Don't report end of live range until the live count reaches 0. 857 }
857 SizeT NewCount = --LiveRegCount[Var->getRegNum()]; 858 if (ShouldReport) {
858 if (NewCount) 859 if (First)
859 ShouldReport = false; 860 Str << " \t# END=";
860 } 861 else
861 if (ShouldReport) { 862 Str << ",";
862 if (First) 863 Var->emit(Func);
863 Str << " \t# END="; 864 First = false;
864 else
865 Str << ",";
866 Var->emit(Func);
867 First = false;
868 }
869 } 865 }
870 } 866 }
871 } 867 }
872 868
873 void updateStats(Cfg *Func, const Inst *I) { 869 void updateStats(Cfg *Func, const Inst *I) {
874 if (!BuildDefs::dump()) 870 if (!BuildDefs::dump())
875 return; 871 return;
876 // Update emitted instruction count, plus fill/spill count for 872 // Update emitted instruction count, plus fill/spill count for
877 // Variable operands without a physical register. 873 // Variable operands without a physical register.
878 if (uint32_t Count = I->getEmitInstCount()) { 874 if (uint32_t Count = I->getEmitInstCount()) {
(...skipping 398 matching lines...) Expand 10 before | Expand all | Expand 10 after
1277 InstIntrinsicCall *Inst = InstIntrinsicCall::create( 1273 InstIntrinsicCall *Inst = InstIntrinsicCall::create(
1278 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info); 1274 Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
1279 Inst->addArg(AtomicRMWOp); 1275 Inst->addArg(AtomicRMWOp);
1280 Inst->addArg(Counter); 1276 Inst->addArg(Counter);
1281 Inst->addArg(One); 1277 Inst->addArg(One);
1282 Inst->addArg(OrderAcquireRelease); 1278 Inst->addArg(OrderAcquireRelease);
1283 Insts.push_front(Inst); 1279 Insts.push_front(Inst);
1284 } 1280 }
1285 1281
1286 } // end of namespace Ice 1282 } // end of namespace Ice
OLDNEW
« no previous file with comments | « src/IceCfg.cpp ('k') | src/IceInst.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698