First two codegen tests passing on SIMMIPS

runtime/vm/assembler_mips.cc

Index: runtime/vm/assembler_mips.cc
===================================================================
--- runtime/vm/assembler_mips.cc	(revision 20729)
+++ runtime/vm/assembler_mips.cc	(working copy)
@@ -76,6 +76,27 @@
 }
 
 
+void Assembler::LoadObject(Register rd, const Object& object) {
+  // Smi's and VM heap objects are never relocated; do not use object pool.
+  if (object.IsSmi()) {
+    LoadImmediate(rd, reinterpret_cast<int32_t>(object.raw()));
+  } else if (object.InVMHeap()) {
+    // Make sure that class CallPattern is able to decode this load immediate.
+    int32_t object_raw = reinterpret_cast<int32_t>(object.raw());
+    const uint16_t object_low = Utils::Low16Bits(object_raw);
+    const uint16_t object_high = Utils::High16Bits(object_raw);
+    lui(rd, Immediate(object_high));
+    ori(rd, rd, Immediate(object_low));
+  } else {
+    // Make sure that class CallPattern is able to decode this load from the
+    // object pool.
+    const int32_t offset =
+        Array::data_offset() + 4*AddObject(object) - kHeapObjectTag;
+    LoadWordFromPoolOffset(rd, offset);
+  }
+}
+
+
 int32_t Assembler::AddObject(const Object& obj) {
   ASSERT(obj.IsNotTemporaryScopedHandle());
   ASSERT(obj.IsOld());
@@ -94,6 +115,92 @@
 }
 
 
+void Assembler::PushObject(const Object& object) {
+  LoadObject(TMP, object);
+  Push(TMP);
+}
+
+
+void Assembler::CompareObject(Register rd, Register rn, const Object& object) {
+  ASSERT(rn != TMP);
+  LoadObject(TMP, object);
+  subu(rd, rn, TMP);
+}
+
+
+void Assembler::EnterStubFrame() {
+  addiu(SP, SP, Immediate(-3 * kWordSize));
+  sw(ZR, Address(SP, 2 * kWordSize));  // PC marker is 0 in stubs.
+  sw(RA, Address(SP, 1 * kWordSize));
+  sw(FP, Address(SP, 0 * kWordSize));
+  mov(FP, SP);
+}
+
+
+void Assembler::LeaveStubFrame() {
+  mov(SP, FP);
+  lw(RA, Address(SP, 1 * kWordSize));
+  lw(FP, Address(SP, 0 * kWordSize));
+  addiu(SP, SP, Immediate(3 * kWordSize));
+}
+
+
+void Assembler::EnterDartFrame(intptr_t frame_size) {
+  const intptr_t offset = CodeSize();
+
+  addiu(SP, SP, Immediate(-4 * kWordSize));
+  sw(RA, Address(SP, 2 * kWordSize));
+  sw(FP, Address(SP, 1 * kWordSize));
+  sw(PP, Address(SP, 0 * kWordSize));
+
+  Label next;
+  // Branch and link to the instruction after the delay slot to get the PC.
+  bal(&next);
+
+  // RA is the address of the sw instruction below. Save it in T0.
+  delay_slot()->mov(T0, RA);
+
+  // Calculate the offset of the pool pointer from the PC.
+  const intptr_t object_pool_pc_dist =
+      Instructions::HeaderSize() - Instructions::object_pool_offset() +
+      CodeSize();
+
+  // This sw instruction is the return address for the bal, so T0 holds
+  // the PC at this sw instruction.
+  Bind(&next);
+  // Save PC in frame for fast identification of corresponding code.
+  sw(T0, Address(SP, 3 * kWordSize));
+
+  // Set FP to the saved previous FP.
+  addiu(FP, SP, Immediate(kWordSize));
+
+  if (offset != 0) {
+    // Adjust saved PC for any intrinsic code that could have been generated
+    // before a frame is created. Use PP as temp register.
+    lw(PP, Address(FP, 2 * kWordSize));

[regis, 2013/04/01 16:44:05]

You do not need to load the pc marker, since you have it in T0. You should also
wait before storing T0 until you have adjusted here.

[zra, 2013/04/01 17:02:33]

Done.

+    addiu(PP, PP, Immediate(-offset));
+    sw(PP, Address(FP, 2 * kWordSize));
+  }
+
+  lw(PP, Address(T0, -object_pool_pc_dist));
+
+  // Reserve space for locals.
+  addiu(SP, SP, Immediate(-frame_size));
+}
+
+
+void Assembler::LeaveDartFrame() {
+  addiu(SP, FP, Immediate(-kWordSize));
+
+  lw(RA, Address(SP, 2 * kWordSize));
+  lw(FP, Address(SP, 1 * kWordSize));
+  lw(PP, Address(SP, 0 * kWordSize));
+
+  // Adjust SP for PC pushed in EnterDartFrame.
+  addiu(SP, SP, Immediate(4 * kWordSize));
+}
+
+
 int32_t Assembler::AddExternalLabel(const ExternalLabel* label) {
   if (object_pool_.IsNull()) {
     // The object pool cannot be used in the vm isolate.