Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(145)

Side by Side Diff: runtime/vm/instructions_mips.cc

Issue 13228002: First two codegen tests passing on SIMMIPS (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « runtime/vm/instructions_mips.h ('k') | runtime/vm/intermediate_language_mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_MIPS.
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/constants_mips.h" 8 #include "vm/constants_mips.h"
9 #include "vm/instructions.h" 9 #include "vm/instructions.h"
10 #include "vm/object.h" 10 #include "vm/object.h"
11 11
12 namespace dart { 12 namespace dart {
13 13
14 CallPattern::CallPattern(uword pc, const Code& code) 14 CallPattern::CallPattern(uword pc, const Code& code)
15 : end_(reinterpret_cast<uword*>(pc)), 15 : end_(reinterpret_cast<uword*>(pc)),
16 target_address_pool_index_(-1), 16 target_address_pool_index_(-1),
17 args_desc_load_end_(-1), 17 args_desc_load_end_(-1),
18 args_desc_pool_index_(-1), 18 args_desc_(Array::Handle()),
19 ic_data_load_end_(-1), 19 ic_data_load_end_(-1),
20 ic_data_pool_index_(-1), 20 ic_data_(ICData::Handle()),
21 object_pool_(Array::Handle(code.ObjectPool())) { 21 object_pool_(Array::Handle(code.ObjectPool())) {
22 ASSERT(code.ContainsInstructionAt(pc)); 22 ASSERT(code.ContainsInstructionAt(pc));
23 ASSERT(Back(2) == 0x0020f809); // Last instruction: jalr RA, TMP(=R1) 23 ASSERT(Back(2) == 0x0020f809); // Last instruction: jalr RA, TMP(=R1)
24 Register reg; 24 Register reg;
25 // First end is 0 so that we begin from the delay slot of the jalr. 25 // First end is 0 so that we begin from the delay slot of the jalr.
26 args_desc_load_end_ = 26 ic_data_load_end_ =
27 DecodeLoadWordFromPool(2, &reg, &target_address_pool_index_); 27 DecodeLoadWordFromPool(2, &reg, &target_address_pool_index_);
28 ASSERT(reg == TMP); 28 ASSERT(reg == TMP);
29 } 29 }
30 30
31 31
32 uword CallPattern::Back(int n) const { 32 uword CallPattern::Back(int n) const {
33 ASSERT(n > 0); 33 ASSERT(n > 0);
34 return *(end_ - n); 34 return *(end_ - n);
35 } 35 }
36 36
37 37
38 // Decodes a load sequence ending at end. Returns the register being loaded and
39 // the loaded object.
40 // Returns the location of the load sequence, counting the number of
41 // instructions back from the end of the call pattern.
42 int CallPattern::DecodeLoadObject(int end, Register* reg, Object* obj) {
43 ASSERT(end > 0);
44 uword i = Back(end + 1);
45 Instr* instr = Instr::At(reinterpret_cast<uword>(&i));
46 if (instr->OpcodeField() == LW) {
47 int index = 0;
48 end = DecodeLoadWordFromPool(end, reg, &index);
49 *obj = object_pool_.At(index);
50 } else {
51 int value = 0;
52 end = DecodeLoadWordImmediate(end, reg, &value);
53 *obj = reinterpret_cast<RawObject*>(value);
54 }
55 return end;
56 }
57
58
59 // Decodes a load sequence ending at end. Returns the register being loaded and
60 // the loaded immediate value.
61 // Returns the location of the load sequence, counting the number of
62 // instructions back from the end of the call pattern.
63 int CallPattern::DecodeLoadWordImmediate(int end, Register* reg, int* value) {
64 ASSERT(end > 0);
65 int imm = 0;
66 uword i = Back(++end);
67 Instr* instr = Instr::At(reinterpret_cast<uword>(&i));
68 ASSERT(instr->OpcodeField() == ORI);
69 imm = instr->UImmField();
70 *reg = instr->RtField();
71
72 i = Back(++end);
73 instr = Instr::At(reinterpret_cast<uword>(&i));
74 ASSERT(instr->OpcodeField() == LUI);
75 ASSERT(instr->RtField() == *reg);
76 imm |= instr->UImmField();
77 *value = imm;
78 return end;
79 }
80
81
82 // Decodes a load sequence ending at end. Returns the register being loaded and
83 // the index in the pool being read from.
84 // Returns the location of the load sequence, counting the number of
85 // instructions back from the end of the call pattern.
38 int CallPattern::DecodeLoadWordFromPool(int end, Register* reg, int* index) { 86 int CallPattern::DecodeLoadWordFromPool(int end, Register* reg, int* index) {
39 ASSERT(end > 0); 87 ASSERT(end > 0);
40 uword i = Back(++end); 88 uword i = Back(++end);
41 Instr* instr = Instr::At(reinterpret_cast<uword>(&i)); 89 Instr* instr = Instr::At(reinterpret_cast<uword>(&i));
42 int offset = 0; 90 int offset = 0;
43 if ((instr->OpcodeField() == LW) && (instr->RsField() == PP)) { 91 if ((instr->OpcodeField() == LW) && (instr->RsField() == PP)) {
44 offset = instr->SImmField(); 92 offset = instr->SImmField();
45 *reg = instr->RtField(); 93 *reg = instr->RtField();
46 } else { 94 } else {
47 ASSERT(instr->OpcodeField() == LW); 95 ASSERT(instr->OpcodeField() == LW);
48 offset = instr->SImmField(); 96 offset = instr->SImmField();
49 *reg = instr->RtField(); 97 *reg = instr->RtField();
50 98
51 i = Back(++end); 99 i = Back(++end);
52 instr = Instr::At(reinterpret_cast<uword>(&i)); 100 instr = Instr::At(reinterpret_cast<uword>(&i));
53 ASSERT(instr->OpcodeField() == SPECIAL); 101 ASSERT(instr->OpcodeField() == SPECIAL);
54 ASSERT(instr->FunctionField() == ADDU); 102 ASSERT(instr->FunctionField() == ADDU);
55 ASSERT(instr->RdField() == *reg); 103 ASSERT(instr->RdField() == *reg);
56 ASSERT(instr->RsField() == *reg); 104 ASSERT(instr->RsField() == *reg);
57 ASSERT(instr->RtField() == PP); 105 ASSERT(instr->RtField() == PP);
58 106
59 i = Back(++end); 107 i = Back(++end);
60 instr = Instr::At(reinterpret_cast<uword>(&i)); 108 instr = Instr::At(reinterpret_cast<uword>(&i));
109 ASSERT(instr->OpcodeField() == LUI);
61 ASSERT(instr->RtField() == *reg); 110 ASSERT(instr->RtField() == *reg);
62 // Offset is signed, so add the upper 16 bits. 111 // Offset is signed, so add the upper 16 bits.
63 offset += (instr->UImmField() << 16); 112 offset += (instr->UImmField() << 16);
64 } 113 }
65 offset += kHeapObjectTag; 114 offset += kHeapObjectTag;
66 ASSERT(Utils::IsAligned(offset, 4)); 115 ASSERT(Utils::IsAligned(offset, 4));
67 *index = (offset - Array::data_offset())/4; 116 *index = (offset - Array::data_offset())/4;
68 return end; 117 return end;
69 } 118 }
70 119
71 120
72 RawICData* CallPattern::IcData() { 121 RawICData* CallPattern::IcData() {
73 UNIMPLEMENTED(); 122 if (ic_data_.IsNull()) {
74 return NULL; 123 Register reg;
124 args_desc_load_end_ = DecodeLoadObject(ic_data_load_end_, &reg, &ic_data_);
125 ASSERT(reg == S5);
126 }
127 return ic_data_.raw();
75 } 128 }
76 129
77 130
78 RawArray* CallPattern::ArgumentsDescriptor() { 131 RawArray* CallPattern::ArgumentsDescriptor() {
79 UNIMPLEMENTED(); 132 if (args_desc_.IsNull()) {
80 return NULL; 133 IcData(); // Loading of the ic_data must be decoded first, if not already.
134 Register reg;
135 DecodeLoadObject(args_desc_load_end_, &reg, &args_desc_);
136 ASSERT(reg == S4);
137 }
138 return args_desc_.raw();
81 } 139 }
82 140
83 141
84 uword CallPattern::TargetAddress() const { 142 uword CallPattern::TargetAddress() const {
85 ASSERT(target_address_pool_index_ >= 0); 143 ASSERT(target_address_pool_index_ >= 0);
86 const Object& target_address = 144 const Object& target_address =
87 Object::Handle(object_pool_.At(target_address_pool_index_)); 145 Object::Handle(object_pool_.At(target_address_pool_index_));
88 ASSERT(target_address.IsSmi()); 146 ASSERT(target_address.IsSmi());
89 // The address is stored in the object array as a RawSmi. 147 // The address is stored in the object array as a RawSmi.
90 return reinterpret_cast<uword>(target_address.raw()); 148 return reinterpret_cast<uword>(target_address.raw());
(...skipping 21 matching lines...) Expand all
112 170
113 171
114 void JumpPattern::SetTargetAddress(uword target_address) const { 172 void JumpPattern::SetTargetAddress(uword target_address) const {
115 UNIMPLEMENTED(); 173 UNIMPLEMENTED();
116 } 174 }
117 175
118 } // namespace dart 176 } // namespace dart
119 177
120 #endif // defined TARGET_ARCH_MIPS 178 #endif // defined TARGET_ARCH_MIPS
121 179
OLDNEW
« no previous file with comments | « runtime/vm/instructions_mips.h ('k') | runtime/vm/intermediate_language_mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698