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Issue 132233055: Consistenly use stderr for printing simulator and debug messages (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/a64
Patch Set: Created 6 years, 10 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 927 matching lines...) Expand 10 before | Expand all | Expand 10 after
938 clr_normal, 938 clr_normal,
939 clr_memory_address, 939 clr_memory_address,
940 address, 940 address,
941 clr_normal); 941 clr_normal);
942 } 942 }
943 943
944 944
945 // Visitors--------------------------------------------------------------------- 945 // Visitors---------------------------------------------------------------------
946 946
947 void Simulator::VisitUnimplemented(Instruction* instr) { 947 void Simulator::VisitUnimplemented(Instruction* instr) {
948 printf("Unimplemented instruction at 0x%p: 0x%08" PRIx32 "\n", 948 fprintf(stream_, "Unimplemented instruction at 0x%p: 0x%08" PRIx32 "\n",
949 reinterpret_cast<void*>(instr), instr->InstructionBits()); 949 reinterpret_cast<void*>(instr), instr->InstructionBits());
950 UNIMPLEMENTED(); 950 UNIMPLEMENTED();
951 } 951 }
952 952
953 953
954 void Simulator::VisitUnallocated(Instruction* instr) { 954 void Simulator::VisitUnallocated(Instruction* instr) {
955 printf("Unallocated instruction at 0x%p: 0x%08" PRIx32 "\n", 955 fprintf(stream_, "Unallocated instruction at 0x%p: 0x%08" PRIx32 "\n",
956 reinterpret_cast<void*>(instr), instr->InstructionBits()); 956 reinterpret_cast<void*>(instr), instr->InstructionBits());
957 UNIMPLEMENTED(); 957 UNIMPLEMENTED();
958 } 958 }
959 959
960 960
961 void Simulator::VisitPCRelAddressing(Instruction* instr) { 961 void Simulator::VisitPCRelAddressing(Instruction* instr) {
962 switch (instr->Mask(PCRelAddressingMask)) { 962 switch (instr->Mask(PCRelAddressingMask)) {
963 case ADR: 963 case ADR:
964 set_reg(instr->Rd(), instr->ImmPCOffsetTarget()); 964 set_reg(instr->Rd(), instr->ImmPCOffsetTarget());
965 break; 965 break;
966 case ADRP: // Not implemented in the assembler. 966 case ADRP: // Not implemented in the assembler.
(...skipping 264 matching lines...) Expand 10 before | Expand all | Expand 10 after
1231 unsigned srcdst = instr->Rt(); 1231 unsigned srcdst = instr->Rt();
1232 uint8_t* address = AddressModeHelper(instr->Rn(), offset, addrmode); 1232 uint8_t* address = AddressModeHelper(instr->Rn(), offset, addrmode);
1233 int num_bytes = 1 << instr->SizeLS(); 1233 int num_bytes = 1 << instr->SizeLS();
1234 1234
1235 // Accesses below the stack pointer (but above the platform stack limit) are 1235 // Accesses below the stack pointer (but above the platform stack limit) are
1236 // not allowed in the ABI. 1236 // not allowed in the ABI.
1237 uint64_t access_address = reinterpret_cast<uint64_t>(address); 1237 uint64_t access_address = reinterpret_cast<uint64_t>(address);
1238 uint64_t stack_limit = reinterpret_cast<uint64_t>(stack_limit_); 1238 uint64_t stack_limit = reinterpret_cast<uint64_t>(stack_limit_);
1239 uint64_t stack_address = sp(); 1239 uint64_t stack_address = sp();
1240 if ((access_address >= stack_limit) && (access_address < stack_address)) { 1240 if ((access_address >= stack_limit) && (access_address < stack_address)) {
1241 printf("ACCESS BELOW STACK POINTER:\n"); 1241 fprintf(stream_, "ACCESS BELOW STACK POINTER:\n");
1242 printf(" sp is here: 0x%016" PRIx64 "\n", stack_address); 1242 fprintf(stream_, " sp is here: 0x%016" PRIx64 "\n",
1243 printf(" access was here: 0x%016" PRIx64 "\n", access_address); 1243 stack_address);
1244 printf(" stack limit is here: 0x%016" PRIx64 "\n", stack_limit); 1244 fprintf(stream_, " access was here: 0x%016" PRIx64 "\n",
1245 printf("\n"); 1245 access_address);
1246 fprintf(stream_, " stack limit is here: 0x%016" PRIx64 "\n", stack_limit);
1247 fprintf(stream_, "\n");
1246 ABORT(); 1248 ABORT();
1247 } 1249 }
1248 1250
1249 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreOpMask)); 1251 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreOpMask));
1250 switch (op) { 1252 switch (op) {
1251 case LDRB_w: 1253 case LDRB_w:
1252 case LDRH_w: 1254 case LDRH_w:
1253 case LDR_w: 1255 case LDR_w:
1254 case LDR_x: set_xreg(srcdst, MemoryRead(address, num_bytes)); break; 1256 case LDR_x: set_xreg(srcdst, MemoryRead(address, num_bytes)); break;
1255 case STRB_w: 1257 case STRB_w:
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3371 // Read the argument encoded inline in the instruction stream. 3373 // Read the argument encoded inline in the instruction stream.
3372 uint32_t type; 3374 uint32_t type;
3373 ASSERT(sizeof(*pc_) == 1); 3375 ASSERT(sizeof(*pc_) == 1);
3374 memcpy(&type, pc_ + kPrintfTypeOffset, sizeof(type)); 3376 memcpy(&type, pc_ + kPrintfTypeOffset, sizeof(type));
3375 3377
3376 const char* format = reg<const char*>(0); 3378 const char* format = reg<const char*>(0);
3377 3379
3378 // Pass all of the relevant PCS registers onto printf. It doesn't 3380 // Pass all of the relevant PCS registers onto printf. It doesn't
3379 // matter if we pass too many as the extra ones won't be read. 3381 // matter if we pass too many as the extra ones won't be read.
3380 int result; 3382 int result;
3381 fputs(clr_printf, stdout); 3383 fputs(clr_printf, stream_);
3382 if (type == CPURegister::kRegister) { 3384 if (type == CPURegister::kRegister) {
3383 result = printf(format, 3385 result = fprintf(stream_, format,
3384 xreg(1), xreg(2), xreg(3), xreg(4), 3386 xreg(1), xreg(2), xreg(3), xreg(4),
3385 xreg(5), xreg(6), xreg(7)); 3387 xreg(5), xreg(6), xreg(7));
3386 } else if (type == CPURegister::kFPRegister) { 3388 } else if (type == CPURegister::kFPRegister) {
3387 result = printf(format, 3389 result = fprintf(stream_, format,
3388 dreg(0), dreg(1), dreg(2), dreg(3), 3390 dreg(0), dreg(1), dreg(2), dreg(3),
3389 dreg(4), dreg(5), dreg(6), dreg(7)); 3391 dreg(4), dreg(5), dreg(6), dreg(7));
3390 } else { 3392 } else {
3391 ASSERT(type == CPURegister::kNoRegister); 3393 ASSERT(type == CPURegister::kNoRegister);
3392 result = printf("%s", format); 3394 result = fprintf(stream_, "%s", format);
3393 } 3395 }
3394 fputs(clr_normal, stdout); 3396 fputs(clr_normal, stream_);
3395 set_xreg(0, result); 3397 set_xreg(0, result);
3396 3398
3397 // TODO(jbramley): Consider clobbering all caller-saved registers here. 3399 // TODO(jbramley): Consider clobbering all caller-saved registers here.
3398 3400
3399 // The printf parameters are inlined in the code, so skip them. 3401 // The printf parameters are inlined in the code, so skip them.
3400 set_pc(pc_->InstructionAtOffset(kPrintfLength)); 3402 set_pc(pc_->InstructionAtOffset(kPrintfLength));
3401 3403
3402 // Set LR as if we'd just called a native printf function. 3404 // Set LR as if we'd just called a native printf function.
3403 set_lr(pc()); 3405 set_lr(pc());
3404 3406
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3416 default: 3418 default:
3417 UNIMPLEMENTED(); 3419 UNIMPLEMENTED();
3418 } 3420 }
3419 } 3421 }
3420 3422
3421 #endif // USE_SIMULATOR 3423 #endif // USE_SIMULATOR
3422 3424
3423 } } // namespace v8::internal 3425 } } // namespace v8::internal
3424 3426
3425 #endif // V8_TARGET_ARCH_A64 3427 #endif // V8_TARGET_ARCH_A64
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