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| 1 | 1 |
| 2 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 2 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 3 // All Rights Reserved. | 3 // All Rights Reserved. |
| 4 // | 4 // |
| 5 // Redistribution and use in source and binary forms, with or without | 5 // Redistribution and use in source and binary forms, with or without |
| 6 // modification, are permitted provided that the following conditions are | 6 // modification, are permitted provided that the following conditions are |
| 7 // met: | 7 // met: |
| 8 // | 8 // |
| 9 // - Redistributions of source code must retain the above copyright notice, | 9 // - Redistributions of source code must retain the above copyright notice, |
| 10 // this list of conditions and the following disclaimer. | 10 // this list of conditions and the following disclaimer. |
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| 257 host(), NULL, cell); | 257 host(), NULL, cell); |
| 258 } | 258 } |
| 259 } | 259 } |
| 260 | 260 |
| 261 | 261 |
| 262 static const int kNoCodeAgeSequenceLength = 7; | 262 static const int kNoCodeAgeSequenceLength = 7; |
| 263 | 263 |
| 264 Code* RelocInfo::code_age_stub() { | 264 Code* RelocInfo::code_age_stub() { |
| 265 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 265 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 266 return Code::GetCodeFromTargetAddress( | 266 return Code::GetCodeFromTargetAddress( |
| 267 Memory::Address_at(pc_ + Assembler::kInstrSize * | 267 Assembler::target_address_at(pc_ + Assembler::kInstrSize)); |
| 268 (kNoCodeAgeSequenceLength - 1))); | |
| 269 } | 268 } |
| 270 | 269 |
| 271 | 270 |
| 272 void RelocInfo::set_code_age_stub(Code* stub) { | 271 void RelocInfo::set_code_age_stub(Code* stub) { |
| 273 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); | 272 ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); |
| 274 Memory::Address_at(pc_ + Assembler::kInstrSize * | 273 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize, |
| 275 (kNoCodeAgeSequenceLength - 1)) = | 274 stub->instruction_start()); |
| 276 stub->instruction_start(); | |
| 277 } | 275 } |
| 278 | 276 |
| 279 | 277 |
| 280 Address RelocInfo::call_address() { | 278 Address RelocInfo::call_address() { |
| 281 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || | 279 ASSERT((IsJSReturn(rmode()) && IsPatchedReturnSequence()) || |
| 282 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); | 280 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence())); |
| 283 // The pc_ offset of 0 assumes mips patched return sequence per | 281 // The pc_ offset of 0 assumes mips patched return sequence per |
| 284 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or | 282 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or |
| 285 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). | 283 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot(). |
| 286 return Assembler::target_address_at(pc_); | 284 return Assembler::target_address_at(pc_); |
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| 415 } | 413 } |
| 416 *reinterpret_cast<Instr*>(pc_) = x; | 414 *reinterpret_cast<Instr*>(pc_) = x; |
| 417 pc_ += kInstrSize; | 415 pc_ += kInstrSize; |
| 418 CheckTrampolinePoolQuick(); | 416 CheckTrampolinePoolQuick(); |
| 419 } | 417 } |
| 420 | 418 |
| 421 | 419 |
| 422 } } // namespace v8::internal | 420 } } // namespace v8::internal |
| 423 | 421 |
| 424 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ | 422 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_ |
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