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Side by Side Diff: src/mips/simulator-mips.h

Issue 1320006: Updates and fixes for MIPS support. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 10 years, 7 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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93 FUNCTION_ADDR(entry), 7, p0, p1, p2, p3, p4, p5, p6) 93 FUNCTION_ADDR(entry), 7, p0, p1, p2, p3, p4, p5, p6)
94 94
95 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \ 95 #define TRY_CATCH_FROM_ADDRESS(try_catch_address) \
96 try_catch_address == NULL ? \ 96 try_catch_address == NULL ? \
97 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address)) 97 NULL : *(reinterpret_cast<TryCatch**>(try_catch_address))
98 98
99 99
100 namespace assembler { 100 namespace assembler {
101 namespace mips { 101 namespace mips {
102 102
103 // -----------------------------------------------------------------------------
104 // Utility functions
105
106 static inline bool is_uintn(int x, int n) {
107 return (x & -(1 << n)) == 0;
108 }
109
110 static inline bool is_uint3(int x) { return is_uintn(x, 3); }
111
112
113
114
103 class Simulator { 115 class Simulator {
104 public: 116 public:
105 friend class Debugger; 117 friend class Debugger;
106 118
107 // Registers are declared in order. See SMRL chapter 2. 119 // Registers are declared in order. See SMRL chapter 2.
108 enum Register { 120 enum Register {
109 no_reg = -1, 121 no_reg = -1,
110 zero_reg = 0, 122 zero_reg = 0,
111 at, 123 at,
112 v0, v1, 124 v0, v1,
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148 // Accessors for register state. Reading the pc value adheres to the MIPS 160 // Accessors for register state. Reading the pc value adheres to the MIPS
149 // architecture specification and is off by a 8 from the currently executing 161 // architecture specification and is off by a 8 from the currently executing
150 // instruction. 162 // instruction.
151 void set_register(int reg, int32_t value); 163 void set_register(int reg, int32_t value);
152 int32_t get_register(int reg) const; 164 int32_t get_register(int reg) const;
153 // Same for FPURegisters 165 // Same for FPURegisters
154 void set_fpu_register(int fpureg, int32_t value); 166 void set_fpu_register(int fpureg, int32_t value);
155 void set_fpu_register_double(int fpureg, double value); 167 void set_fpu_register_double(int fpureg, double value);
156 int32_t get_fpu_register(int fpureg) const; 168 int32_t get_fpu_register(int fpureg) const;
157 double get_fpu_register_double(int fpureg) const; 169 double get_fpu_register_double(int fpureg) const;
170 void set_fpu_ccr_bit(uint32_t cc, bool value);
171 bool test_fpu_ccr_bit(uint32_t cc);
158 172
159 // Special case of set_register and get_register to access the raw PC value. 173 // Special case of set_register and get_register to access the raw PC value.
160 void set_pc(int32_t value); 174 void set_pc(int32_t value);
161 int32_t get_pc() const; 175 int32_t get_pc() const;
162 176
163 // Accessor to the internal simulator stack area. 177 // Accessor to the internal simulator stack area.
164 uintptr_t StackLimit() const; 178 uintptr_t StackLimit() const;
165 179
166 // Executes MIPS instructions until the PC reaches end_sim_pc. 180 // Executes MIPS instructions until the PC reaches end_sim_pc.
167 void Execute(); 181 void Execute();
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262 276
263 // Used for real time calls that takes two double values as arguments and 277 // Used for real time calls that takes two double values as arguments and
264 // returns a double. 278 // returns a double.
265 void SetFpResult(double result); 279 void SetFpResult(double result);
266 280
267 // Architecture state. 281 // Architecture state.
268 // Registers. 282 // Registers.
269 int32_t registers_[kNumSimuRegisters]; 283 int32_t registers_[kNumSimuRegisters];
270 // Coprocessor Registers. 284 // Coprocessor Registers.
271 int32_t FPUregisters_[kNumFPURegisters]; 285 int32_t FPUregisters_[kNumFPURegisters];
286 // FPU Condition Code register.
287 int32_t FPUccr_;
272 288
273 // Simulator support. 289 // Simulator support.
274 char* stack_; 290 char* stack_;
275 bool pc_modified_; 291 bool pc_modified_;
276 int icount_; 292 int icount_;
277 static bool initialized_; 293 static bool initialized_;
278 294
279 // Registered breakpoints. 295 // Registered breakpoints.
280 Instruction* break_pc_; 296 Instruction* break_pc_;
281 Instr break_instr_; 297 Instr break_instr_;
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302 318
303 static inline void UnregisterCTryCatch() { 319 static inline void UnregisterCTryCatch() {
304 assembler::mips::Simulator::current()->PopAddress(); 320 assembler::mips::Simulator::current()->PopAddress();
305 } 321 }
306 }; 322 };
307 323
308 #endif // defined(__mips) 324 #endif // defined(__mips)
309 325
310 #endif // V8_MIPS_SIMULATOR_MIPS_H_ 326 #endif // V8_MIPS_SIMULATOR_MIPS_H_
311 327
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