Updates and fixes for MIPS support.

src/mips/cpu-mips.cc

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 18 matching lines @@
 
 #include <sys/syscall.h>
 #include <unistd.h>
 
 #ifdef __mips
 #include <asm/cachectl.h>
 #endif  // #ifdef __mips
 
 #include "v8.h"
 #include "cpu.h"
+#include "macro-assembler.h"
 
 namespace v8 {
 namespace internal {
 
 void CPU::Setup() {
-  // Nothing to do.
+  CpuFeatures::Probe();
 }
 
 void CPU::FlushICache(void* start, size_t size) {
 #ifdef __mips
   int res;
 
   // See http://www.linux-mips.org/wiki/Cacheflush_Syscall
   res = syscall(__NR_cacheflush, start, size, ICACHE);
 
   if (res) {
     V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache");
   }
 
 #endif    // #ifdef __mips
 }
 
 
 void CPU::DebugBreak() {
 #ifdef __mips
   asm volatile("break");
 #endif  // #ifdef __mips
 }
 
 } }  // namespace v8::internal