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| 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. | 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 593 // Feature flags bit positions. They are mostly based on the CPUID spec. | 593 // Feature flags bit positions. They are mostly based on the CPUID spec. |
| 594 // (We assign CPUID itself to one of the currently reserved bits -- | 594 // (We assign CPUID itself to one of the currently reserved bits -- |
| 595 // feel free to change this if needed.) | 595 // feel free to change this if needed.) |
| 596 enum CpuFeature { SSE3 = 32, // x86 | 596 enum CpuFeature { SSE3 = 32, // x86 |
| 597 SSE2 = 26, // x86 | 597 SSE2 = 26, // x86 |
| 598 CMOV = 15, // x86 | 598 CMOV = 15, // x86 |
| 599 RDTSC = 4, // x86 | 599 RDTSC = 4, // x86 |
| 600 CPUID = 10, // x86 | 600 CPUID = 10, // x86 |
| 601 VFP3 = 1, // ARM | 601 VFP3 = 1, // ARM |
| 602 ARMv7 = 2, // ARM | 602 ARMv7 = 2, // ARM |
| 603 FPU = 1, // MIPS |
| 603 SAHF = 0}; // x86 | 604 SAHF = 0}; // x86 |
| 604 | 605 |
| 605 } } // namespace v8::internal | 606 } } // namespace v8::internal |
| 606 | 607 |
| 607 #endif // V8_GLOBALS_H_ | 608 #endif // V8_GLOBALS_H_ |
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Chromium Code Reviews
Issue 1320006:
Updates and fixes for MIPS support. (Closed)
Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/