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Unified Diff: src/IceTargetLoweringX8632Traits.h

Issue 1319203005: Subzero. Changes the Register Allocator so that it is aware of register (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: make format Created 5 years, 3 months ago
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Index: src/IceTargetLoweringX8632Traits.h
diff --git a/src/IceTargetLoweringX8632Traits.h b/src/IceTargetLoweringX8632Traits.h
index 3bfd404b76df098334726f24cea339126ded3c7c..1b861c5ec61d7735fdb2599a02fafc042a465843 100644
--- a/src/IceTargetLoweringX8632Traits.h
+++ b/src/IceTargetLoweringX8632Traits.h
@@ -25,6 +25,8 @@
#include "IceTargetLoweringX8632.def"
#include "IceTargetLowering.h"
+#include <vector>
Jim Stichnoth 2015/09/03 17:48:49 Is this needed? I would have expected <array> if
John 2015/09/03 22:38:25 Done.
+
namespace Ice {
class TargetX8632;
@@ -312,20 +314,43 @@ template <> struct MachineTraits<TargetX8632> {
}
}
- static void initRegisterSet(llvm::SmallBitVector *IntegerRegisters,
- llvm::SmallBitVector *IntegerRegistersI8,
- llvm::SmallBitVector *FloatRegisters,
- llvm::SmallBitVector *VectorRegisters,
- llvm::SmallBitVector *ScratchRegs) {
+ static void initRegisterSet(
+ std::array<llvm::SmallBitVector, IceType_NUM> *TypeToRegisterSet,
+ std::array<llvm::SmallBitVector, RegisterSet::Reg_NUM> *RegisterAliases,
+ llvm::SmallBitVector *ScratchRegs) {
+ llvm::SmallBitVector IntegerRegisters(RegisterSet::Reg_NUM);
+ llvm::SmallBitVector IntegerRegistersI8(RegisterSet::Reg_NUM);
+ llvm::SmallBitVector FloatRegisters(RegisterSet::Reg_NUM);
+ llvm::SmallBitVector VectorRegisters(RegisterSet::Reg_NUM);
+ llvm::SmallBitVector InvalidRegisters(RegisterSet::Reg_NUM);
+ ScratchRegs->resize(RegisterSet::Reg_NUM);
#define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
frameptr, isI8, isInt, isFP) \
- (*IntegerRegisters)[RegisterSet::val] = isInt; \
- (*IntegerRegistersI8)[RegisterSet::val] = isI8; \
- (*FloatRegisters)[RegisterSet::val] = isFP; \
- (*VectorRegisters)[RegisterSet::val] = isFP; \
+ (IntegerRegisters)[RegisterSet::val] = isInt; \
+ (IntegerRegistersI8)[RegisterSet::val] = isI8; \
+ (FloatRegisters)[RegisterSet::val] = isFP; \
+ (VectorRegisters)[RegisterSet::val] = isFP; \
+ (*RegisterAliases)[RegisterSet::val].resize(RegisterSet::Reg_NUM); \
+ (*RegisterAliases)[RegisterSet::val].set(RegisterSet::val); \
(*ScratchRegs)[RegisterSet::val] = scratch;
REGX8632_TABLE;
#undef X
+
+ (*TypeToRegisterSet)[IceType_void] = InvalidRegisters;
+ (*TypeToRegisterSet)[IceType_i1] = IntegerRegistersI8;
+ (*TypeToRegisterSet)[IceType_i8] = IntegerRegistersI8;
+ (*TypeToRegisterSet)[IceType_i16] = IntegerRegisters;
+ (*TypeToRegisterSet)[IceType_i32] = IntegerRegisters;
+ (*TypeToRegisterSet)[IceType_i64] = IntegerRegisters;
+ (*TypeToRegisterSet)[IceType_f32] = FloatRegisters;
+ (*TypeToRegisterSet)[IceType_f64] = FloatRegisters;
+ (*TypeToRegisterSet)[IceType_v4i1] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v8i1] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v16i1] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v16i8] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v8i16] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v4i32] = VectorRegisters;
+ (*TypeToRegisterSet)[IceType_v4f32] = VectorRegisters;
}
static llvm::SmallBitVector

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