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Side by Side Diff: src/IceTargetLowering.h

Issue 1319203005: Subzero. Changes the Register Allocator so that it is aware of register (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments. Created 5 years, 3 months ago
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1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===// 1 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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204 RegSet_CalleeSave = 1 << 1, 204 RegSet_CalleeSave = 1 << 1,
205 RegSet_StackPointer = 1 << 2, 205 RegSet_StackPointer = 1 << 2,
206 RegSet_FramePointer = 1 << 3, 206 RegSet_FramePointer = 1 << 3,
207 RegSet_All = ~RegSet_None 207 RegSet_All = ~RegSet_None
208 }; 208 };
209 typedef uint32_t RegSetMask; 209 typedef uint32_t RegSetMask;
210 210
211 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include, 211 virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
212 RegSetMask Exclude) const = 0; 212 RegSetMask Exclude) const = 0;
213 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0; 213 virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0;
214 virtual const llvm::SmallBitVector &getAliasesForRegister(SizeT) const = 0;
215
214 void regAlloc(RegAllocKind Kind); 216 void regAlloc(RegAllocKind Kind);
215 217
216 virtual void 218 virtual void
217 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation, 219 makeRandomRegisterPermutation(llvm::SmallVectorImpl<int32_t> &Permutation,
218 const llvm::SmallBitVector &ExcludeRegisters, 220 const llvm::SmallBitVector &ExcludeRegisters,
219 uint64_t Salt) const = 0; 221 uint64_t Salt) const = 0;
220 222
221 /// Save/restore any mutable state for the situation where code 223 /// Save/restore any mutable state for the situation where code
222 /// emission needs multiple passes, such as sandboxing or relaxation. 224 /// emission needs multiple passes, such as sandboxing or relaxation.
223 /// Subclasses may provide their own implementation, but should be 225 /// Subclasses may provide their own implementation, but should be
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454 virtual void lower() {} 456 virtual void lower() {}
455 457
456 protected: 458 protected:
457 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {} 459 explicit TargetHeaderLowering(GlobalContext *Ctx) : Ctx(Ctx) {}
458 GlobalContext *Ctx; 460 GlobalContext *Ctx;
459 }; 461 };
460 462
461 } // end of namespace Ice 463 } // end of namespace Ice
462 464
463 #endif // SUBZERO_SRC_ICETARGETLOWERING_H 465 #endif // SUBZERO_SRC_ICETARGETLOWERING_H
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