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Side by Side Diff: src/IceTargetLoweringARM32.cpp

Issue 1318883007: Fix the build for clang 3.8 and MINIMAL=1. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 3 months ago
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1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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49 49
50 const struct TableIcmp32_ { 50 const struct TableIcmp32_ {
51 CondARM32::Cond Mapping; 51 CondARM32::Cond Mapping;
52 } TableIcmp32[] = { 52 } TableIcmp32[] = {
53 #define X(val, is_signed, swapped64, C_32, C1_64, C2_64) \ 53 #define X(val, is_signed, swapped64, C_32, C1_64, C2_64) \
54 { CondARM32::C_32 } \ 54 { CondARM32::C_32 } \
55 , 55 ,
56 ICMPARM32_TABLE 56 ICMPARM32_TABLE
57 #undef X 57 #undef X
58 }; 58 };
59 const size_t TableIcmp32Size = llvm::array_lengthof(TableIcmp32);
Jim Stichnoth 2015/09/09 18:52:00 I assume the problem was an unused variable in NOD
ascull 2015/09/09 18:55:06 I gave it a go but it still complained it was unus
60 59
61 // The following table summarizes the logic for lowering the icmp instruction 60 // The following table summarizes the logic for lowering the icmp instruction
62 // for the i64 type. Two conditional moves are needed for setting to 1 or 0. 61 // for the i64 type. Two conditional moves are needed for setting to 1 or 0.
63 // The operands may need to be swapped, and there is a slight difference 62 // The operands may need to be swapped, and there is a slight difference
64 // for signed vs unsigned (comparing hi vs lo first, and using cmp vs sbc). 63 // for signed vs unsigned (comparing hi vs lo first, and using cmp vs sbc).
65 const struct TableIcmp64_ { 64 const struct TableIcmp64_ {
66 bool IsSigned; 65 bool IsSigned;
67 bool Swapped; 66 bool Swapped;
68 CondARM32::Cond C1, C2; 67 CondARM32::Cond C1, C2;
69 } TableIcmp64[] = { 68 } TableIcmp64[] = {
70 #define X(val, is_signed, swapped64, C_32, C1_64, C2_64) \ 69 #define X(val, is_signed, swapped64, C_32, C1_64, C2_64) \
71 { is_signed, swapped64, CondARM32::C1_64, CondARM32::C2_64 } \ 70 { is_signed, swapped64, CondARM32::C1_64, CondARM32::C2_64 } \
72 , 71 ,
73 ICMPARM32_TABLE 72 ICMPARM32_TABLE
74 #undef X 73 #undef X
75 }; 74 };
76 const size_t TableIcmp64Size = llvm::array_lengthof(TableIcmp64);
77 75
78 CondARM32::Cond getIcmp32Mapping(InstIcmp::ICond Cond) { 76 CondARM32::Cond getIcmp32Mapping(InstIcmp::ICond Cond) {
79 size_t Index = static_cast<size_t>(Cond); 77 size_t Index = static_cast<size_t>(Cond);
80 assert(Index < TableIcmp32Size); 78 assert(Index < llvm::array_lengthof(TableIcmp32));
81 return TableIcmp32[Index].Mapping; 79 return TableIcmp32[Index].Mapping;
82 } 80 }
83 81
84 // In some cases, there are x-macros tables for both high-level and 82 // In some cases, there are x-macros tables for both high-level and
85 // low-level instructions/operands that use the same enum key value. 83 // low-level instructions/operands that use the same enum key value.
86 // The tables are kept separate to maintain a proper separation 84 // The tables are kept separate to maintain a proper separation
87 // between abstraction layers. There is a risk that the tables could 85 // between abstraction layers. There is a risk that the tables could
88 // get out of sync if enum values are reordered or if entries are 86 // get out of sync if enum values are reordered or if entries are
89 // added or deleted. The following dummy namespaces use 87 // added or deleted. The following dummy namespaces use
90 // static_asserts to ensure everything is kept in sync. 88 // static_asserts to ensure everything is kept in sync.
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2158 // and one conditonal reg mov. That has few dependencies for good ILP, 2156 // and one conditonal reg mov. That has few dependencies for good ILP,
2159 // but is a longer sequence. 2157 // but is a longer sequence.
2160 // 2158 //
2161 // So, we are going with the GCC version since it's usually better (except 2159 // So, we are going with the GCC version since it's usually better (except
2162 // perhaps for eq/ne). We could revisit special-casing eq/ne later. 2160 // perhaps for eq/ne). We could revisit special-casing eq/ne later.
2163 Constant *Zero = Ctx->getConstantZero(IceType_i32); 2161 Constant *Zero = Ctx->getConstantZero(IceType_i32);
2164 Constant *One = Ctx->getConstantInt32(1); 2162 Constant *One = Ctx->getConstantInt32(1);
2165 if (Src0->getType() == IceType_i64) { 2163 if (Src0->getType() == IceType_i64) {
2166 InstIcmp::ICond Conditon = Inst->getCondition(); 2164 InstIcmp::ICond Conditon = Inst->getCondition();
2167 size_t Index = static_cast<size_t>(Conditon); 2165 size_t Index = static_cast<size_t>(Conditon);
2168 assert(Index < TableIcmp64Size); 2166 assert(Index < llvm::array_lengthof(TableIcmp64));
2169 Variable *Src0Lo, *Src0Hi; 2167 Variable *Src0Lo, *Src0Hi;
2170 Operand *Src1LoRF, *Src1HiRF; 2168 Operand *Src1LoRF, *Src1HiRF;
2171 if (TableIcmp64[Index].Swapped) { 2169 if (TableIcmp64[Index].Swapped) {
2172 Src0Lo = legalizeToReg(loOperand(Src1)); 2170 Src0Lo = legalizeToReg(loOperand(Src1));
2173 Src0Hi = legalizeToReg(hiOperand(Src1)); 2171 Src0Hi = legalizeToReg(hiOperand(Src1));
2174 Src1LoRF = legalize(loOperand(Src0), Legal_Reg | Legal_Flex); 2172 Src1LoRF = legalize(loOperand(Src0), Legal_Reg | Legal_Flex);
2175 Src1HiRF = legalize(hiOperand(Src0), Legal_Reg | Legal_Flex); 2173 Src1HiRF = legalize(hiOperand(Src0), Legal_Reg | Legal_Flex);
2176 } else { 2174 } else {
2177 Src0Lo = legalizeToReg(loOperand(Src0)); 2175 Src0Lo = legalizeToReg(loOperand(Src0));
2178 Src0Hi = legalizeToReg(hiOperand(Src0)); 2176 Src0Hi = legalizeToReg(hiOperand(Src0));
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3056 << ".eabi_attribute 68, 1 @ Tag_Virtualization_use\n"; 3054 << ".eabi_attribute 68, 1 @ Tag_Virtualization_use\n";
3057 if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) { 3055 if (CPUFeatures.hasFeature(TargetARM32Features::HWDivArm)) {
3058 Str << ".eabi_attribute 44, 2 @ Tag_DIV_use\n"; 3056 Str << ".eabi_attribute 44, 2 @ Tag_DIV_use\n";
3059 } 3057 }
3060 // Technically R9 is used for TLS with Sandboxing, and we reserve it. 3058 // Technically R9 is used for TLS with Sandboxing, and we reserve it.
3061 // However, for compatibility with current NaCl LLVM, don't claim that. 3059 // However, for compatibility with current NaCl LLVM, don't claim that.
3062 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n"; 3060 Str << ".eabi_attribute 14, 3 @ Tag_ABI_PCS_R9_use: Not used\n";
3063 } 3061 }
3064 3062
3065 } // end of namespace Ice 3063 } // end of namespace Ice
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