| OLD | NEW |
| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
| (...skipping 2690 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 2701 } | 2701 } |
| 2702 | 2702 |
| 2703 | 2703 |
| 2704 void Assembler::BranchLink(const ExternalLabel* label, Patchability patchable) { | 2704 void Assembler::BranchLink(const ExternalLabel* label, Patchability patchable) { |
| 2705 // Make sure that class CallPattern is able to patch the label referred | 2705 // Make sure that class CallPattern is able to patch the label referred |
| 2706 // to by this code sequence. | 2706 // to by this code sequence. |
| 2707 // For added code robustness, use 'blx lr' in a patchable sequence and | 2707 // For added code robustness, use 'blx lr' in a patchable sequence and |
| 2708 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). | 2708 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). |
| 2709 const int32_t offset = ObjectPool::element_offset( | 2709 const int32_t offset = ObjectPool::element_offset( |
| 2710 object_pool_wrapper_.FindExternalLabel(label, patchable)); | 2710 object_pool_wrapper_.FindExternalLabel(label, patchable)); |
| 2711 LoadWordFromPoolOffset(LR, offset - kHeapObjectTag); | 2711 LoadWordFromPoolOffset(LR, offset - kHeapObjectTag, AL); |
| 2712 blx(LR); // Use blx instruction so that the return branch prediction works. | 2712 blx(LR); // Use blx instruction so that the return branch prediction works. |
| 2713 } | 2713 } |
| 2714 | 2714 |
| 2715 | 2715 |
| 2716 void Assembler::BranchLink(const StubEntry& stub_entry, | 2716 void Assembler::BranchLink(const StubEntry& stub_entry, |
| 2717 Patchability patchable) { | 2717 Patchability patchable) { |
| 2718 BranchLink(&stub_entry.label(), patchable); | 2718 BranchLink(&stub_entry.label(), patchable); |
| 2719 } | 2719 } |
| 2720 | 2720 |
| 2721 | 2721 |
| (...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 2754 } | 2754 } |
| 2755 } | 2755 } |
| 2756 | 2756 |
| 2757 | 2757 |
| 2758 void Assembler::LoadDecodableImmediate( | 2758 void Assembler::LoadDecodableImmediate( |
| 2759 Register rd, int32_t value, Condition cond) { | 2759 Register rd, int32_t value, Condition cond) { |
| 2760 const ARMVersion version = TargetCPUFeatures::arm_version(); | 2760 const ARMVersion version = TargetCPUFeatures::arm_version(); |
| 2761 if ((version == ARMv5TE) || (version == ARMv6)) { | 2761 if ((version == ARMv5TE) || (version == ARMv6)) { |
| 2762 if (constant_pool_allowed()) { | 2762 if (constant_pool_allowed()) { |
| 2763 const int32_t offset = Array::element_offset(FindImmediate(value)); | 2763 const int32_t offset = Array::element_offset(FindImmediate(value)); |
| 2764 LoadWordFromPoolOffset(rd, offset - kHeapObjectTag); | 2764 LoadWordFromPoolOffset(rd, offset - kHeapObjectTag, cond); |
| 2765 } else { | 2765 } else { |
| 2766 LoadPatchableImmediate(rd, value, cond); | 2766 LoadPatchableImmediate(rd, value, cond); |
| 2767 } | 2767 } |
| 2768 } else { | 2768 } else { |
| 2769 ASSERT(version == ARMv7); | 2769 ASSERT(version == ARMv7); |
| 2770 movw(rd, Utils::Low16Bits(value), cond); | 2770 movw(rd, Utils::Low16Bits(value), cond); |
| 2771 const uint16_t value_high = Utils::High16Bits(value); | 2771 const uint16_t value_high = Utils::High16Bits(value); |
| 2772 if (value_high != 0) { | 2772 if (value_high != 0) { |
| 2773 movt(rd, value_high, cond); | 2773 movt(rd, value_high, cond); |
| 2774 } | 2774 } |
| (...skipping 878 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3653 | 3653 |
| 3654 | 3654 |
| 3655 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3655 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3656 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3656 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3657 return fpu_reg_names[reg]; | 3657 return fpu_reg_names[reg]; |
| 3658 } | 3658 } |
| 3659 | 3659 |
| 3660 } // namespace dart | 3660 } // namespace dart |
| 3661 | 3661 |
| 3662 #endif // defined TARGET_ARCH_ARM | 3662 #endif // defined TARGET_ARCH_ARM |
| OLD | NEW |