Fix warnings produced by g++ on Windows.

src/IceAssemblerX86Base.h

 //===- subzero/src/IceAssemblerX86Base.h - base x86 assembler -*- C++ -*---===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 936 matching lines @@
   template <typename RegType>
   bool is8BitRegisterRequiringRex(const Type Ty, const RegType Reg) {
     static constexpr bool IsGPR =
         std::is_same<typename std::decay<RegType>::type,
                      typename Traits::ByteRegister>::value ||
         std::is_same<typename std::decay<RegType>::type,
                      typename Traits::GPRRegister>::value;
 
     return IsGPR && (Reg & 0x04) != 0 && (Reg & 0x08) == 0 &&
            isByteSizedType(Ty);
-  };
+  }
 
   // assembleAndEmitRex is used for determining which (if any) rex prefix should
   // be emitted for the current instruction. It allows different types for Reg
   // and Rm because they could be of different types (e.g., in mov[sz]x
   // instrutions.) If Addr is not nullptr, then Rm is ignored, and Rex.B is
   // determined by Addr instead. TyRm is still used to determine Addr's size.
   template <typename RegType, typename RmType, typename T = Traits>
   typename std::enable_if<T::Is64Bit, void>::type
   assembleAndEmitRex(const Type TyReg, const RegType Reg, const Type TyRm,
                      const RmType Rm,
                      const typename T::Address *Addr = nullptr) {
     const uint8_t W = (TyReg == IceType_i64 || TyRm == IceType_i64)
                           ? T::Operand::RexW
                           : T::Operand::RexNone;
     const uint8_t R = (Reg & 0x08) ? T::Operand::RexR : T::Operand::RexNone;
-    const uint8_t X = (Addr != nullptr) ? Addr->rexX() : T::Operand::RexNone;
+    const uint8_t X = (Addr != nullptr)
+                          ? (typename T::Operand::RexBits)Addr->rexX()
+                          : T::Operand::RexNone;
     const uint8_t B =
-        (Addr != nullptr) ? Addr->rexB() : (Rm & 0x08) ? T::Operand::RexB
-                                                       : T::Operand::RexNone;
+        (Addr != nullptr)
+            ? (typename T::Operand::RexBits)Addr->rexB()
+            : (Rm & 0x08) ? T::Operand::RexB : T::Operand::RexNone;
     const uint8_t Prefix = W | R | X | B;
     if (Prefix != T::Operand::RexNone) {
       emitUint8(Prefix);
     } else if (is8BitRegisterRequiringRex(TyReg, Reg) ||
                (Addr == nullptr && is8BitRegisterRequiringRex(TyRm, Rm))) {
       emitUint8(T::Operand::RexBase);
     }
   }
 
   template <typename RegType, typename RmType, typename T = Traits>
@@ skipping 75 matching lines @@
   emitUint8(0x66);
 }
 
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #include "IceAssemblerX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEASSEMBLERX86BASE_H