[not for landing] Diff between a64 and r19234 for no-a64 files.

src/code-stubs.h

Index: src/code-stubs.h
diff --git a/src/code-stubs.h b/src/code-stubs.h
index a7283ba642ef4ea2742cbba7ed77e9783faf39a1..2a0a6609e05c00d10762a4c08079dae99e0ba4cd 100644
--- a/src/code-stubs.h
+++ b/src/code-stubs.h
@@ -107,6 +107,12 @@ namespace internal {
   V(SetProperty)               \
   V(InvokeBuiltin)             \
   V(DirectCEntry)
+#elif V8_TARGET_ARCH_A64

[rmcilroy, 2014/02/11 18:31:06]

These seem to be the same, could we merge into the previous ifdef and make it
#if defined(V8_TARGET_ARCH_ARM) || defined(V8_TARGET_ARCH_A64).

[Rodolph Perfetta, 2014/02/12 01:08:24]

Yes they can be consolidated.

On 2014/02/11 18:31:06, rmcilroy wrote:

+#define CODE_STUB_LIST_ARM(V)  \
+  V(GetProperty)               \
+  V(SetProperty)               \
+  V(InvokeBuiltin)             \
+  V(DirectCEntry)
 #else
 #define CODE_STUB_LIST_ARM(V)
 #endif
@@ -442,6 +448,8 @@ class RuntimeCallHelper {
 #include "ia32/code-stubs-ia32.h"
 #elif V8_TARGET_ARCH_X64
 #include "x64/code-stubs-x64.h"
+#elif V8_TARGET_ARCH_A64
+#include "a64/code-stubs-a64.h"
 #elif V8_TARGET_ARCH_ARM
 #include "arm/code-stubs-arm.h"
 #elif V8_TARGET_ARCH_MIPS
@@ -1866,23 +1874,47 @@ class DoubleToIStub : public PlatformCodeStub {
                 int offset,
                 bool is_truncating,
                 bool skip_fastpath = false) : bit_field_(0) {
+#if V8_TARGET_ARCH_A64
+    // TODO(jbramley): Make A64's Register type compatible with the normal code,
+    // so we don't need this special case.
+    bit_field_ = SourceRegisterBits::encode(source.code()) |
+      DestinationRegisterBits::encode(destination.code()) |
+      OffsetBits::encode(offset) |
+      IsTruncatingBits::encode(is_truncating) |
+      SkipFastPathBits::encode(skip_fastpath) |
+      SSEBits::encode(CpuFeatures::IsSafeForSnapshot(SSE2) ?
+                      CpuFeatures::IsSafeForSnapshot(SSE3) ? 2 : 1 : 0);
+#else
     bit_field_ = SourceRegisterBits::encode(source.code_) |
       DestinationRegisterBits::encode(destination.code_) |
       OffsetBits::encode(offset) |
       IsTruncatingBits::encode(is_truncating) |
       SkipFastPathBits::encode(skip_fastpath) |
       SSEBits::encode(CpuFeatures::IsSafeForSnapshot(SSE2) ?
-                          CpuFeatures::IsSafeForSnapshot(SSE3) ? 2 : 1 : 0);
+                      CpuFeatures::IsSafeForSnapshot(SSE3) ? 2 : 1 : 0);
+#endif
   }
 
   Register source() {
+#if V8_TARGET_ARCH_A64
+    // TODO(jbramley): Make A64's Register type compatible with the normal code,
+    // so we don't need this special case.
+    return Register::XRegFromCode(SourceRegisterBits::decode(bit_field_));
+#else
     Register result = { SourceRegisterBits::decode(bit_field_) };
     return result;
+#endif
   }
 
   Register destination() {
+#if V8_TARGET_ARCH_A64
+    // TODO(jbramley): Make A64's Register type compatible with the normal code,
+    // so we don't need this special case.
+    return Register::XRegFromCode(DestinationRegisterBits::decode(bit_field_));
+#else
     Register result = { DestinationRegisterBits::decode(bit_field_) };
     return result;
+#endif
   }
 
   bool is_truncating() {