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Issue 131263003: MIPS: Implement sqrt in inline assembly. (Closed) Base URL: https://github.com/v8/v8.git@gbl
Patch Set: Fix argument/result handlers. Created 6 years, 11 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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3519 3519
3520 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) { 3520 void MacroAssembler::GetCFunctionDoubleResult(const DoubleRegister dst) {
3521 if (IsMipsSoftFloatABI) { 3521 if (IsMipsSoftFloatABI) {
3522 Move(dst, v0, v1); 3522 Move(dst, v0, v1);
3523 } else { 3523 } else {
3524 Move(dst, f0); // Reg f0 is o32 ABI FP return value. 3524 Move(dst, f0); // Reg f0 is o32 ABI FP return value.
3525 } 3525 }
3526 } 3526 }
3527 3527
3528 3528
3529 void MacroAssembler::GetFromCDoubleArguments(const DoubleRegister dst) {
3530 if (IsMipsSoftFloatABI) {
3531 Move(dst, a0, a1);
3532 } else {
3533 Move(dst, f12); // Reg f12 is o32 ABI FP first argument value.
3534 }
3535 }
3536
3537
3529 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) { 3538 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg) {
3530 if (!IsMipsSoftFloatABI) { 3539 if (!IsMipsSoftFloatABI) {
3531 Move(f12, dreg); 3540 Move(f12, dreg);
3532 } else { 3541 } else {
3533 Move(a0, a1, dreg); 3542 Move(a0, a1, dreg);
3534 } 3543 }
3535 } 3544 }
3536 3545
3537 3546
3547 void MacroAssembler::SetForCDoubleResult(DoubleRegister dreg) {
3548 if (!IsMipsSoftFloatABI) {
3549 Move(f0, dreg);
3550 } else {
3551 Move(v0, v1, dreg);
3552 }
3553 }
3554
3555
3538 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1, 3556 void MacroAssembler::SetCallCDoubleArguments(DoubleRegister dreg1,
3539 DoubleRegister dreg2) { 3557 DoubleRegister dreg2) {
3540 if (!IsMipsSoftFloatABI) { 3558 if (!IsMipsSoftFloatABI) {
3541 if (dreg2.is(f12)) { 3559 if (dreg2.is(f12)) {
3542 ASSERT(!dreg1.is(f14)); 3560 ASSERT(!dreg1.is(f14));
3543 Move(f14, dreg2); 3561 Move(f14, dreg2);
3544 Move(f12, dreg1); 3562 Move(f12, dreg1);
3545 } else { 3563 } else {
3546 Move(f12, dreg1); 3564 Move(f12, dreg1);
3547 Move(f14, dreg2); 3565 Move(f14, dreg2);
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5789 opcode == BGTZL); 5807 opcode == BGTZL);
5790 opcode = (cond == eq) ? BEQ : BNE; 5808 opcode = (cond == eq) ? BEQ : BNE;
5791 instr = (instr & ~kOpcodeMask) | opcode; 5809 instr = (instr & ~kOpcodeMask) | opcode;
5792 masm_.emit(instr); 5810 masm_.emit(instr);
5793 } 5811 }
5794 5812
5795 5813
5796 } } // namespace v8::internal 5814 } } // namespace v8::internal
5797 5815
5798 #endif // V8_TARGET_ARCH_MIPS 5816 #endif // V8_TARGET_ARCH_MIPS
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