Add UBSAN build option and fix undefined behaviour errors.

src/IceInstARM32.h

 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 18 matching lines @@
 
 /// OperandARM32 extends the Operand hierarchy.  Its subclasses are
 /// OperandARM32Mem and OperandARM32Flex.
 class OperandARM32 : public Operand {
   OperandARM32() = delete;
   OperandARM32(const OperandARM32 &) = delete;
   OperandARM32 &operator=(const OperandARM32 &) = delete;
 
 public:
   enum OperandKindARM32 {
-    k__Start = Operand::kTarget,
+    k__Start = Operand::kTarget0,
     kMem,
     kFlexStart,
     kFlexImm = kFlexStart,
     kFlexReg,
     kFlexEnd = kFlexReg
   };
 
   enum ShiftKind {
     kNoShift = -1,
 #define X(enum, emit) enum,
@@ skipping 200 matching lines @@
 class StackVariable final : public Variable {
   StackVariable() = delete;
   StackVariable(const StackVariable &) = delete;
   StackVariable &operator=(const StackVariable &) = delete;
 
 public:
   static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) {
     return new (Func->allocate<StackVariable>()) StackVariable(Ty, Index);
   }
   const static OperandKind StackVariableKind =
-      static_cast<OperandKind>(kVariable_Target);
+      static_cast<OperandKind>(kVariable_Target0);
   static bool classof(const Operand *Operand) {
     return Operand->getKind() == StackVariableKind;
   }
   void setBaseRegNum(int32_t RegNum) { BaseRegNum = RegNum; }
   int32_t getBaseRegNum() const override { return BaseRegNum; }
   // Inherit dump() and emit() from Variable.
 
 private:
   StackVariable(Type Ty, SizeT Index)
       : Variable(StackVariableKind, Ty, Index) {}
   int32_t BaseRegNum = Variable::NoRegister;
 };
 
 /// Base class for ARM instructions. While most ARM instructions can be
 /// conditionally executed, a few of them are not predicable (halt,
 /// memory barriers, etc.).
 class InstARM32 : public InstTarget {
   InstARM32() = delete;
   InstARM32(const InstARM32 &) = delete;
   InstARM32 &operator=(const InstARM32 &) = delete;
 
 public:
   enum InstKindARM32 {
-    k__Start = Inst::Target,
+    k__Start = Inst::Target0,
     Adc,
     Add,
     Adjuststack,
     And,
     Asr,
     Bic,
     Br,
     Call,
     Cmp,
     Clz,
@@ skipping 805 matching lines @@
 template <> void InstARM32Ldr::emit(const Cfg *Func) const;
 template <> void InstARM32Mov::emit(const Cfg *Func) const;
 template <> void InstARM32Movw::emit(const Cfg *Func) const;
 template <> void InstARM32Movt::emit(const Cfg *Func) const;
 template <> void InstARM32Vldr::emit(const Cfg *Func) const;
 template <> void InstARM32Vmov::emit(const Cfg *Func) const;
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTARM32_H