Fixes ABI bug in MIPS.

runtime/vm/instructions_mips.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_MIPS.
 #if defined(TARGET_ARCH_MIPS)
 
 #include "vm/constants_mips.h"
 #include "vm/cpu.h"
 #include "vm/instructions.h"
 #include "vm/object.h"
 
 namespace dart {
 
 CallPattern::CallPattern(uword pc, const Code& code)
     : object_pool_(Array::Handle(code.ObjectPool())),
       end_(pc),
       args_desc_load_end_(0),
       ic_data_load_end_(0),
       target_address_pool_index_(-1),
       args_desc_(Array::Handle()),
       ic_data_(ICData::Handle()) {
   ASSERT(code.ContainsInstructionAt(pc));
-  // Last instruction: jalr RA, TMP(=R1).
-  ASSERT(*(reinterpret_cast<uword*>(end_) - 2) == 0x0020f809);
+  // Last instruction: jalr RA, T9(=R25).
+  ASSERT(*(reinterpret_cast<uword*>(end_) - 2) == 0x0320f809);
   Register reg;
   // The end of the pattern is the instruction after the delay slot of the jalr.
   ic_data_load_end_ =
       InstructionPattern::DecodeLoadWordFromPool(end_ - (2 * Instr::kInstrSize),
                                                  &reg,
                                                  &target_address_pool_index_);
-  ASSERT(reg == TMP);
+  ASSERT(reg == T9);
 }
 
 
 // Decodes a load sequence ending at 'end' (the last instruction of the load
 // sequence is the instruction before the one at end).  Returns a pointer to
 // the first instruction in the sequence.  Returns the register being loaded
 // and the loaded object in the output parameters 'reg' and 'obj'
 // respectively.
 uword InstructionPattern::DecodeLoadObject(uword end,
                                            const Array& object_pool,
@@ skipping 130 matching lines @@
 
 
 void CallPattern::InsertAt(uword pc, uword target_address) {
   Instr* lui = Instr::At(pc + (0 * Instr::kInstrSize));
   Instr* ori = Instr::At(pc + (1 * Instr::kInstrSize));
   Instr* jr = Instr::At(pc + (2 * Instr::kInstrSize));
   Instr* nop = Instr::At(pc + (3 * Instr::kInstrSize));
   uint16_t target_lo = target_address & 0xffff;
   uint16_t target_hi = target_address >> 16;
 
-  lui->SetImmInstrBits(LUI, ZR, TMP, target_hi);
-  ori->SetImmInstrBits(ORI, TMP, TMP, target_lo);
-  jr->SetSpecialInstrBits(JALR, TMP, ZR, RA);
+  lui->SetImmInstrBits(LUI, ZR, T9, target_hi);
+  ori->SetImmInstrBits(ORI, T9, T9, target_lo);
+  jr->SetSpecialInstrBits(JALR, T9, ZR, RA);
   nop->SetInstructionBits(Instr::kNopInstruction);
 
   ASSERT(kFixedLengthInBytes == 4 * Instr::kInstrSize);
   CPU::FlushICache(pc, kFixedLengthInBytes);
 }
 
 
 JumpPattern::JumpPattern(uword pc, const Code& code) : pc_(pc) { }
 
 
@@ skipping 27 matching lines @@
   const uint16_t target_lo = target_address & 0xffff;
   const uint16_t target_hi = target_address >> 16;
 
   lui->SetInstructionBits((lui_bits & 0xffff0000) | target_hi);
   ori->SetInstructionBits((ori_bits & 0xffff0000) | target_lo);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_MIPS