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1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 | 5 |
6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
8 // on regular desktop machines. | 8 // on regular desktop machines. |
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
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286 // Get Double Higher / Lower word. | 286 // Get Double Higher / Lower word. |
287 inline int32_t GetDoubleHIW(double* addr); | 287 inline int32_t GetDoubleHIW(double* addr); |
288 inline int32_t GetDoubleLOW(double* addr); | 288 inline int32_t GetDoubleLOW(double* addr); |
289 // Set Double Higher / Lower word. | 289 // Set Double Higher / Lower word. |
290 inline int32_t SetDoubleHIW(double* addr); | 290 inline int32_t SetDoubleHIW(double* addr); |
291 inline int32_t SetDoubleLOW(double* addr); | 291 inline int32_t SetDoubleLOW(double* addr); |
292 | 292 |
293 // Executing is handled based on the instruction type. | 293 // Executing is handled based on the instruction type. |
294 void DecodeTypeRegister(Instruction* instr); | 294 void DecodeTypeRegister(Instruction* instr); |
295 | 295 |
296 // Called from DecodeTypeRegisterCOP1 | 296 // Functions called from DecodeTypeRegister. |
297 void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fr_reg, | 297 void DecodeTypeRegisterCOP1(); |
298 const int32_t& fs_reg, const int32_t& ft_reg, | |
299 const int32_t& fd_reg); | |
300 void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out, | |
301 const int32_t& fd_reg, const int32_t& fs_reg, | |
302 const int32_t& ft_reg); | |
303 void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg, | |
304 const int32_t& fs_reg, const int32_t& fd_reg); | |
305 void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg, | |
306 const int32_t& fs_reg, const int32_t& fd_reg); | |
307 | 298 |
308 // Functions called from DeocodeTypeRegister | 299 void DecodeTypeRegisterCOP1X(); |
309 void DecodeTypeRegisterCOP1( | |
310 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, | |
311 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, | |
312 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | |
313 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, | |
314 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, | |
315 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); | |
316 | 300 |
| 301 void DecodeTypeRegisterSPECIAL(); |
317 | 302 |
318 void DecodeTypeRegisterCOP1X(Instruction* instr, const int32_t& fr_reg, | 303 void DecodeTypeRegisterSPECIAL2(); |
319 const int32_t& fs_reg, const int32_t& ft_reg, | |
320 const int32_t& fd_reg); | |
321 | 304 |
| 305 void DecodeTypeRegisterSPECIAL3(); |
322 | 306 |
323 void DecodeTypeRegisterSPECIAL( | 307 // Called from DecodeTypeRegisterCOP1. |
324 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, | 308 void DecodeTypeRegisterSRsType(); |
325 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, | |
326 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | |
327 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, | |
328 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, | |
329 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); | |
330 | 309 |
| 310 void DecodeTypeRegisterDRsType(); |
331 | 311 |
332 void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int32_t& rd_reg, | 312 void DecodeTypeRegisterWRsType(); |
333 int32_t& alu_out); | |
334 | 313 |
335 void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg, | 314 void DecodeTypeRegisterLRsType(); |
336 const int32_t& rd_reg, int32_t& alu_out); | |
337 | 315 |
338 // Helper function for DecodeTypeRegister. | 316 Instruction* currentInstr_; |
339 void ConfigureTypeRegister(Instruction* instr, | 317 inline Instruction* get_instr() const { return currentInstr_; } |
340 int32_t* alu_out, | 318 inline void set_instr(Instruction* instr) { currentInstr_ = instr; } |
341 int64_t* i64hilo, | 319 |
342 uint64_t* u64hilo, | 320 inline int32_t rs_reg() const { return currentInstr_->RsValue(); } |
343 int32_t* next_pc, | 321 inline int32_t rs() const { return get_register(rs_reg()); } |
344 int32_t* return_addr_reg, | 322 inline uint32_t rs_u() const { |
345 bool* do_interrupt); | 323 return static_cast<uint32_t>(get_register(rs_reg())); |
| 324 } |
| 325 inline int32_t rt_reg() const { return currentInstr_->RtValue(); } |
| 326 inline int32_t rt() const { return get_register(rt_reg()); } |
| 327 inline uint32_t rt_u() const { |
| 328 return static_cast<uint32_t>(get_register(rt_reg())); |
| 329 } |
| 330 inline int32_t rd_reg() const { return currentInstr_->RdValue(); } |
| 331 inline int32_t fr_reg() const { return currentInstr_->FrValue(); } |
| 332 inline int32_t fs_reg() const { return currentInstr_->FsValue(); } |
| 333 inline int32_t ft_reg() const { return currentInstr_->FtValue(); } |
| 334 inline int32_t fd_reg() const { return currentInstr_->FdValue(); } |
| 335 inline int32_t sa() const { return currentInstr_->SaValue(); } |
| 336 |
| 337 inline void SetResult(int32_t rd_reg, int32_t alu_out) { |
| 338 set_register(rd_reg, alu_out); |
| 339 TraceRegWr(alu_out); |
| 340 } |
346 | 341 |
347 void DecodeTypeImmediate(Instruction* instr); | 342 void DecodeTypeImmediate(Instruction* instr); |
348 void DecodeTypeJump(Instruction* instr); | 343 void DecodeTypeJump(Instruction* instr); |
349 | 344 |
350 // Used for breakpoints and traps. | 345 // Used for breakpoints and traps. |
351 void SoftwareInterrupt(Instruction* instr); | 346 void SoftwareInterrupt(Instruction* instr); |
352 | 347 |
353 // Stop helper functions. | 348 // Stop helper functions. |
354 bool IsWatchpoint(uint32_t code); | 349 bool IsWatchpoint(uint32_t code); |
355 void PrintWatchpoint(uint32_t code); | 350 void PrintWatchpoint(uint32_t code); |
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387 int size); | 382 int size); |
388 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); | 383 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); |
389 | 384 |
390 enum Exception { | 385 enum Exception { |
391 none, | 386 none, |
392 kIntegerOverflow, | 387 kIntegerOverflow, |
393 kIntegerUnderflow, | 388 kIntegerUnderflow, |
394 kDivideByZero, | 389 kDivideByZero, |
395 kNumExceptions | 390 kNumExceptions |
396 }; | 391 }; |
397 int16_t exceptions[kNumExceptions]; | |
398 | 392 |
399 // Exceptions. | 393 // Exceptions. |
400 void SignalExceptions(); | 394 void SignalException(Exception e); |
401 | 395 |
402 // Runtime call support. | 396 // Runtime call support. |
403 static void* RedirectExternalReference(void* external_function, | 397 static void* RedirectExternalReference(void* external_function, |
404 ExternalReference::Type type); | 398 ExternalReference::Type type); |
405 | 399 |
406 // Handle arguments and return value for runtime FP functions. | 400 // Handle arguments and return value for runtime FP functions. |
407 void GetFpArgs(double* x, double* y, int32_t* z); | 401 void GetFpArgs(double* x, double* y, int32_t* z); |
408 void SetFpResult(const double& result); | 402 void SetFpResult(const double& result); |
409 | 403 |
410 void CallInternal(byte* entry); | 404 void CallInternal(byte* entry); |
411 | 405 |
412 // Architecture state. | 406 // Architecture state. |
413 // Registers. | 407 // Registers. |
414 int32_t registers_[kNumSimuRegisters]; | 408 int32_t registers_[kNumSimuRegisters]; |
415 // Coprocessor Registers. | 409 // Coprocessor Registers. |
416 // Note: FP32 mode uses only the lower 32-bit part of each element, | 410 // Note: FP32 mode uses only the lower 32-bit part of each element, |
417 // the upper 32-bit is unpredictable. | 411 // the upper 32-bit is unpredictable. |
418 int64_t FPUregisters_[kNumFPURegisters]; | 412 int64_t FPUregisters_[kNumFPURegisters]; |
419 // FPU control register. | 413 // FPU control register. |
420 uint32_t FCSR_; | 414 uint32_t FCSR_; |
421 | 415 |
422 // Simulator support. | 416 // Simulator support. |
423 // Allocate 1MB for stack. | 417 // Allocate 1MB for stack. |
424 static const size_t stack_size_ = 1 * 1024*1024; | 418 static const size_t stack_size_ = 1 * 1024*1024; |
425 char* stack_; | 419 char* stack_; |
426 bool pc_modified_; | 420 bool pc_modified_; |
427 int icount_; | 421 uint64_t icount_; |
428 int break_count_; | 422 int break_count_; |
429 | 423 |
430 // Debugger input. | 424 // Debugger input. |
431 char* last_debugger_input_; | 425 char* last_debugger_input_; |
432 | 426 |
433 // Icache simulation. | 427 // Icache simulation. |
434 v8::internal::HashMap* i_cache_; | 428 v8::internal::HashMap* i_cache_; |
435 | 429 |
436 v8::internal::Isolate* isolate_; | 430 v8::internal::Isolate* isolate_; |
437 | 431 |
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483 | 477 |
484 static inline void UnregisterCTryCatch() { | 478 static inline void UnregisterCTryCatch() { |
485 Simulator::current(Isolate::Current())->PopAddress(); | 479 Simulator::current(Isolate::Current())->PopAddress(); |
486 } | 480 } |
487 }; | 481 }; |
488 | 482 |
489 } } // namespace v8::internal | 483 } } // namespace v8::internal |
490 | 484 |
491 #endif // !defined(USE_SIMULATOR) | 485 #endif // !defined(USE_SIMULATOR) |
492 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 486 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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