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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 | 5 |
| 6 // Declares a Simulator for MIPS instructions if we are not generating a native | 6 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 8 // on regular desktop machines. | 8 // on regular desktop machines. |
| 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, | 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, |
| 10 // which will start execution in the Simulator or forwards to the real entry | 10 // which will start execution in the Simulator or forwards to the real entry |
| (...skipping 275 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 286 // Get Double Higher / Lower word. | 286 // Get Double Higher / Lower word. |
| 287 inline int32_t GetDoubleHIW(double* addr); | 287 inline int32_t GetDoubleHIW(double* addr); |
| 288 inline int32_t GetDoubleLOW(double* addr); | 288 inline int32_t GetDoubleLOW(double* addr); |
| 289 // Set Double Higher / Lower word. | 289 // Set Double Higher / Lower word. |
| 290 inline int32_t SetDoubleHIW(double* addr); | 290 inline int32_t SetDoubleHIW(double* addr); |
| 291 inline int32_t SetDoubleLOW(double* addr); | 291 inline int32_t SetDoubleLOW(double* addr); |
| 292 | 292 |
| 293 // Executing is handled based on the instruction type. | 293 // Executing is handled based on the instruction type. |
| 294 void DecodeTypeRegister(Instruction* instr); | 294 void DecodeTypeRegister(Instruction* instr); |
| 295 | 295 |
| 296 // Functions called from DeocodeTypeRegister | |
|
paul.l...
2015/09/02 17:30:13
nits: Spelling: DecodeTypeRegister and end with pe
balazs.kilvady
2015/09/04 12:57:15
Done.
| |
| 297 void DecodeTypeRegisterCOP1(); | |
| 298 | |
| 299 void DecodeTypeRegisterCOP1X(); | |
| 300 | |
| 301 void DecodeTypeRegisterSPECIAL(); | |
| 302 | |
| 303 void DecodeTypeRegisterSPECIAL2(); | |
| 304 | |
| 305 void DecodeTypeRegisterSPECIAL3(); | |
| 306 | |
| 296 // Called from DecodeTypeRegisterCOP1 | 307 // Called from DecodeTypeRegisterCOP1 |
| 297 void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fr_reg, | 308 void DecodeTypeRegisterSRsType(); |
| 298 const int32_t& fs_reg, const int32_t& ft_reg, | |
| 299 const int32_t& fd_reg); | |
| 300 void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out, | |
| 301 const int32_t& fd_reg, const int32_t& fs_reg, | |
| 302 const int32_t& ft_reg); | |
| 303 void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg, | |
| 304 const int32_t& fs_reg, const int32_t& fd_reg); | |
| 305 void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg, | |
| 306 const int32_t& fs_reg, const int32_t& fd_reg); | |
| 307 | 309 |
| 308 // Functions called from DeocodeTypeRegister | 310 void DecodeTypeRegisterDRsType(); |
| 309 void DecodeTypeRegisterCOP1( | |
| 310 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, | |
| 311 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, | |
| 312 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | |
| 313 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, | |
| 314 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, | |
| 315 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); | |
| 316 | 311 |
| 312 void DecodeTypeRegisterWRsType(); | |
| 317 | 313 |
| 318 void DecodeTypeRegisterCOP1X(Instruction* instr, const int32_t& fr_reg, | 314 void DecodeTypeRegisterLRsType(); |
| 319 const int32_t& fs_reg, const int32_t& ft_reg, | |
| 320 const int32_t& fd_reg); | |
| 321 | 315 |
| 316 Instruction* currentInstr_; | |
| 317 inline Instruction* get_instr() const { return currentInstr_; } | |
| 318 inline void set_instr(Instruction* instr) { currentInstr_ = instr; } | |
| 322 | 319 |
| 323 void DecodeTypeRegisterSPECIAL( | 320 inline int32_t rs_reg() const { return currentInstr_->RsValue(); } |
| 324 Instruction* instr, const int32_t& rs_reg, const int32_t& rs, | 321 inline int32_t rs() const { return get_register(rs_reg()); } |
| 325 const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt, | 322 inline uint32_t rs_u() const { |
| 326 const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg, | 323 return static_cast<uint32_t>(get_register(rs_reg())); |
| 327 const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg, | 324 } |
| 328 int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt, | 325 inline int32_t rt_reg() const { return currentInstr_->RtValue(); } |
| 329 int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg); | 326 inline int32_t rt() const { return get_register(rt_reg()); } |
| 327 inline uint32_t rt_u() const { | |
| 328 return static_cast<uint32_t>(get_register(rt_reg())); | |
| 329 } | |
| 330 inline int32_t rd_reg() const { return currentInstr_->RdValue(); } | |
| 331 inline int32_t fr_reg() const { return currentInstr_->FrValue(); } | |
| 332 inline int32_t fs_reg() const { return currentInstr_->FsValue(); } | |
| 333 inline int32_t ft_reg() const { return currentInstr_->FtValue(); } | |
| 334 inline int32_t fd_reg() const { return currentInstr_->FdValue(); } | |
| 335 inline int32_t sa() const { return currentInstr_->SaValue(); } | |
| 330 | 336 |
| 331 | 337 inline void set_result(const int32_t rd_reg, const int32_t alu_out) { |
| 332 void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int32_t& rd_reg, | 338 set_register(rd_reg, alu_out); |
| 333 int32_t& alu_out); | 339 TraceRegWr(alu_out); |
| 334 | 340 } |
| 335 void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg, | |
| 336 const int32_t& rd_reg, int32_t& alu_out); | |
| 337 | |
| 338 // Helper function for DecodeTypeRegister. | |
| 339 void ConfigureTypeRegister(Instruction* instr, | |
| 340 int32_t* alu_out, | |
| 341 int64_t* i64hilo, | |
| 342 uint64_t* u64hilo, | |
| 343 int32_t* next_pc, | |
| 344 int32_t* return_addr_reg, | |
| 345 bool* do_interrupt); | |
| 346 | 341 |
| 347 void DecodeTypeImmediate(Instruction* instr); | 342 void DecodeTypeImmediate(Instruction* instr); |
| 348 void DecodeTypeJump(Instruction* instr); | 343 void DecodeTypeJump(Instruction* instr); |
| 349 | 344 |
| 350 // Used for breakpoints and traps. | 345 // Used for breakpoints and traps. |
| 351 void SoftwareInterrupt(Instruction* instr); | 346 void SoftwareInterrupt(Instruction* instr); |
| 352 | 347 |
| 353 // Stop helper functions. | 348 // Stop helper functions. |
| 354 bool IsWatchpoint(uint32_t code); | 349 bool IsWatchpoint(uint32_t code); |
| 355 void PrintWatchpoint(uint32_t code); | 350 void PrintWatchpoint(uint32_t code); |
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| 387 int size); | 382 int size); |
| 388 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); | 383 static CachePage* GetCachePage(v8::internal::HashMap* i_cache, void* page); |
| 389 | 384 |
| 390 enum Exception { | 385 enum Exception { |
| 391 none, | 386 none, |
| 392 kIntegerOverflow, | 387 kIntegerOverflow, |
| 393 kIntegerUnderflow, | 388 kIntegerUnderflow, |
| 394 kDivideByZero, | 389 kDivideByZero, |
| 395 kNumExceptions | 390 kNumExceptions |
| 396 }; | 391 }; |
| 397 int16_t exceptions[kNumExceptions]; | |
| 398 | 392 |
| 399 // Exceptions. | 393 // Exceptions. |
| 400 void SignalExceptions(); | 394 void SignalException(Exception e); |
| 395 | |
| 396 inline void ArithmeticCommon(const int32_t rt_reg, const int32_t alu_out); | |
| 401 | 397 |
| 402 // Runtime call support. | 398 // Runtime call support. |
| 403 static void* RedirectExternalReference(void* external_function, | 399 static void* RedirectExternalReference(void* external_function, |
| 404 ExternalReference::Type type); | 400 ExternalReference::Type type); |
| 405 | 401 |
| 406 // Handle arguments and return value for runtime FP functions. | 402 // Handle arguments and return value for runtime FP functions. |
| 407 void GetFpArgs(double* x, double* y, int32_t* z); | 403 void GetFpArgs(double* x, double* y, int32_t* z); |
| 408 void SetFpResult(const double& result); | 404 void SetFpResult(const double& result); |
| 409 | 405 |
| 410 void CallInternal(byte* entry); | 406 void CallInternal(byte* entry); |
| 411 | 407 |
| 412 // Architecture state. | 408 // Architecture state. |
| 413 // Registers. | 409 // Registers. |
| 414 int32_t registers_[kNumSimuRegisters]; | 410 int32_t registers_[kNumSimuRegisters]; |
| 415 // Coprocessor Registers. | 411 // Coprocessor Registers. |
| 416 // Note: FP32 mode uses only the lower 32-bit part of each element, | 412 // Note: FP32 mode uses only the lower 32-bit part of each element, |
| 417 // the upper 32-bit is unpredictable. | 413 // the upper 32-bit is unpredictable. |
| 418 int64_t FPUregisters_[kNumFPURegisters]; | 414 int64_t FPUregisters_[kNumFPURegisters]; |
| 419 // FPU control register. | 415 // FPU control register. |
| 420 uint32_t FCSR_; | 416 uint32_t FCSR_; |
| 421 | 417 |
| 422 // Simulator support. | 418 // Simulator support. |
| 423 // Allocate 1MB for stack. | 419 // Allocate 1MB for stack. |
| 424 static const size_t stack_size_ = 1 * 1024*1024; | 420 static const size_t stack_size_ = 1 * 1024*1024; |
| 425 char* stack_; | 421 char* stack_; |
| 426 bool pc_modified_; | 422 bool pc_modified_; |
| 427 int icount_; | 423 uint64_t icount_; |
| 424 uint64_t type_immediate_count_; | |
|
paul.l...
2015/09/02 17:30:13
I tend to think these counts of the various types
balazs.kilvady
2015/09/04 12:57:15
Done.
| |
| 425 uint64_t type_register_count_; | |
| 426 uint64_t type_register_cop1_count_; | |
| 427 uint64_t type_register_cop1x_count_; | |
| 428 uint64_t type_register_special_count_; | |
| 429 uint64_t type_register_special2_count_; | |
| 430 uint64_t type_register_special3_count_; | |
| 431 uint64_t type_jump_count_; | |
| 428 int break_count_; | 432 int break_count_; |
| 429 | 433 |
| 430 // Debugger input. | 434 // Debugger input. |
| 431 char* last_debugger_input_; | 435 char* last_debugger_input_; |
| 432 | 436 |
| 433 // Icache simulation. | 437 // Icache simulation. |
| 434 v8::internal::HashMap* i_cache_; | 438 v8::internal::HashMap* i_cache_; |
| 435 | 439 |
| 436 v8::internal::Isolate* isolate_; | 440 v8::internal::Isolate* isolate_; |
| 437 | 441 |
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| 483 | 487 |
| 484 static inline void UnregisterCTryCatch() { | 488 static inline void UnregisterCTryCatch() { |
| 485 Simulator::current(Isolate::Current())->PopAddress(); | 489 Simulator::current(Isolate::Current())->PopAddress(); |
| 486 } | 490 } |
| 487 }; | 491 }; |
| 488 | 492 |
| 489 } } // namespace v8::internal | 493 } } // namespace v8::internal |
| 490 | 494 |
| 491 #endif // !defined(USE_SIMULATOR) | 495 #endif // !defined(USE_SIMULATOR) |
| 492 #endif // V8_MIPS_SIMULATOR_MIPS_H_ | 496 #endif // V8_MIPS_SIMULATOR_MIPS_H_ |
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