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Unified Diff: src/IceTargetLoweringARM32.cpp

Issue 1310863007: Subzero. Changes the declaration for ARM32 registers. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 3 months ago
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« src/IceInstARM32.def ('K') | « src/IceRegistersARM32.h ('k') | no next file » | no next file with comments »
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Index: src/IceTargetLoweringARM32.cpp
diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index 5edd00aa92566ca94dcc964e085e5356198929ef..bc13c7b868258c65b31efc90b39581542edbe7b3 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -182,13 +182,17 @@ TargetARM32::TargetARM32(Cfg *Func)
llvm::SmallBitVector InvalidRegisters(RegARM32::Reg_NUM);
ScratchRegs.resize(RegARM32::Reg_NUM);
#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
- isFP32, isFP64, isVec128) \
+ isFP32, isFP64, isVec128, alias_init) \
IntegerRegisters[RegARM32::val] = isInt; \
Float32Registers[RegARM32::val] = isFP32; \
Float64Registers[RegARM32::val] = isFP64; \
VectorRegisters[RegARM32::val] = isVec128; \
RegisterAliases[RegARM32::val].resize(RegARM32::Reg_NUM); \
- RegisterAliases[RegARM32::val].set(RegARM32::val); \
+ for (SizeT RegAlias : alias_init) { \
+ RegisterAliases[RegARM32::val].set(RegAlias); \
+ } \
+ RegisterAliases[RegARM32::val].resize(RegARM32::Reg_NUM); \
+ assert(RegisterAliases[RegARM32::val][RegARM32::val]); \
ScratchRegs[RegARM32::val] = scratch;
REGARM32_TABLE;
#undef X
@@ -368,7 +372,7 @@ IceString TargetARM32::getRegName(SizeT RegNum, Type Ty) const {
(void)Ty;
static const char *RegNames[] = {
#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
- isFP32, isFP64, isVec128) \
+ isFP32, isFP64, isVec128, alias_init) \
name,
REGARM32_TABLE
#undef X
@@ -467,7 +471,7 @@ bool TargetARM32::CallingConv::FPInReg(Type Ty, int32_t *Reg) {
return false;
if (isVectorType(Ty)) {
NumFPRegUnits = Utils::applyAlignment(NumFPRegUnits, 4);
- *Reg = RegARM32::Reg_q0 + (NumFPRegUnits / 4);
+ *Reg = RegARM32::Reg_q0 - (NumFPRegUnits / 4);
Jim Stichnoth 2015/09/04 20:24:16 How about something like: // Handle reg numberi
John 2015/09/04 21:23:25 Not a fan -- but I also hate the current approach.
NumFPRegUnits += 4;
// If this bumps us past the boundary, don't allocate to a register
// and leave any previously speculatively consumed registers as consumed.
@@ -475,7 +479,7 @@ bool TargetARM32::CallingConv::FPInReg(Type Ty, int32_t *Reg) {
return false;
} else if (Ty == IceType_f64) {
NumFPRegUnits = Utils::applyAlignment(NumFPRegUnits, 2);
- *Reg = RegARM32::Reg_d0 + (NumFPRegUnits / 2);
+ *Reg = RegARM32::Reg_d0 - (NumFPRegUnits / 2);
NumFPRegUnits += 2;
// If this bumps us past the boundary, don't allocate to a register
// and leave any previously speculatively consumed registers as consumed.
@@ -1152,7 +1156,7 @@ llvm::SmallBitVector TargetARM32::getRegisterSet(RegSetMask Include,
llvm::SmallBitVector Registers(RegARM32::Reg_NUM);
#define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
- isFP32, isFP64, isVec128) \
+ isFP32, isFP64, isVec128, alias_init) \
if (scratch && (Include & RegSet_CallerSave)) \
Registers[RegARM32::val] = true; \
if (preserved && (Include & RegSet_CalleeSave)) \
« src/IceInstARM32.def ('K') | « src/IceRegistersARM32.h ('k') | no next file » | no next file with comments »

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