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| 1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// | 1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| 11 /// This file declares the LinearScan data structure used during | 11 /// This file declares the LinearScan data structure used during linear-scan |
| 12 /// linear-scan register allocation, which holds the various work | 12 /// register allocation, which holds the various work queues for the linear-scan |
| 13 /// queues for the linear-scan algorithm. | 13 /// algorithm. |
| 14 /// | 14 /// |
| 15 //===----------------------------------------------------------------------===// | 15 //===----------------------------------------------------------------------===// |
| 16 | 16 |
| 17 #ifndef SUBZERO_SRC_ICEREGALLOC_H | 17 #ifndef SUBZERO_SRC_ICEREGALLOC_H |
| 18 #define SUBZERO_SRC_ICEREGALLOC_H | 18 #define SUBZERO_SRC_ICEREGALLOC_H |
| 19 | 19 |
| 20 #include "IceDefs.h" | 20 #include "IceDefs.h" |
| 21 #include "IceOperand.h" | |
| 21 #include "IceTypes.h" | 22 #include "IceTypes.h" |
| 22 | 23 |
| 23 namespace Ice { | 24 namespace Ice { |
| 24 | 25 |
| 25 class LinearScan { | 26 class LinearScan { |
| 26 LinearScan() = delete; | 27 LinearScan() = delete; |
| 27 LinearScan(const LinearScan &) = delete; | 28 LinearScan(const LinearScan &) = delete; |
| 28 LinearScan &operator=(const LinearScan &) = delete; | 29 LinearScan &operator=(const LinearScan &) = delete; |
| 29 | 30 |
| 30 public: | 31 public: |
| 31 explicit LinearScan(Cfg *Func) : Func(Func) {} | 32 explicit LinearScan(Cfg *Func); |
| 32 void init(RegAllocKind Kind); | 33 void init(RegAllocKind Kind); |
| 33 void scan(const llvm::SmallBitVector &RegMask, bool Randomized); | 34 void scan(const llvm::SmallBitVector &RegMask, bool Randomized); |
| 34 void dump(Cfg *Func) const; | 35 void dump(Cfg *Func) const; |
| 35 | 36 |
| 36 private: | 37 private: |
| 37 typedef std::vector<Variable *> OrderedRanges; | 38 typedef std::vector<Variable *> OrderedRanges; |
| 38 typedef std::vector<Variable *> UnorderedRanges; | 39 typedef std::vector<Variable *> UnorderedRanges; |
| 39 | 40 |
| 40 void initForGlobal(); | 41 void initForGlobal(); |
| 41 void initForInfOnly(); | 42 void initForInfOnly(); |
| 42 /// Free up a register for infinite-weight Cur by spilling and reloading some | 43 /// Move an item from the From set to the To set. From[Index] is pushed onto |
| 43 /// register that isn't used during Cur's live range. | 44 /// the end of To[], then the item is efficiently removed from From[] by |
| 44 void addSpillFill(Variable *Cur, llvm::SmallBitVector RegMask); | 45 /// effectively swapping it with the last item in From[] and then popping it |
| 45 /// Move an item from the From set to the To set. From[Index] is | 46 /// from the back. As such, the caller is best off iterating over From[] in |
| 46 /// pushed onto the end of To[], then the item is efficiently removed | 47 /// reverse order to avoid the need for special handling of the iterator. |
| 47 /// from From[] by effectively swapping it with the last item in | |
| 48 /// From[] and then popping it from the back. As such, the caller is | |
| 49 /// best off iterating over From[] in reverse order to avoid the need | |
| 50 /// for special handling of the iterator. | |
| 51 void moveItem(UnorderedRanges &From, SizeT Index, UnorderedRanges &To) { | 48 void moveItem(UnorderedRanges &From, SizeT Index, UnorderedRanges &To) { |
| 52 To.push_back(From[Index]); | 49 To.push_back(From[Index]); |
| 53 From[Index] = From.back(); | 50 From[Index] = From.back(); |
| 54 From.pop_back(); | 51 From.pop_back(); |
| 55 } | 52 } |
| 56 | 53 |
| 54 /// \name scan helper functions. | |
| 55 /// @{ | |
| 56 /// Free up a register for infinite-weight Cur by spilling and reloading some | |
| 57 /// register that isn't used during Cur's live range. | |
| 58 void addSpillFill(Variable *Cur, llvm::SmallBitVector RegMask); | |
|
Jim Stichnoth
2015/08/24 15:08:31
I think all these SmallBitVectors should be passed
ascull
2015/08/24 19:53:48
This gets taken care of by passing IterationState
| |
| 59 /// Check for active ranges that have expired or become inactive. | |
| 60 void handleActiveRangeExpiredOrInactive(Variable *Cur); | |
| 61 /// Check for inactive ranges that have expired or reactivated. | |
| 62 void handleInctiveRangeExpiredOrReactived(Variable *Cur); | |
|
Jim Stichnoth
2015/08/24 15:08:31
Reactivated
jvoung (off chromium)
2015/08/24 15:33:01
Inctive -> Inactive
ascull
2015/08/24 19:53:48
Done.
ascull
2015/08/24 19:53:48
Done.
| |
| 63 void findRegisterPreference(Variable *Cur, llvm::SmallBitVector RegMask); | |
| 64 void filterFreeWithInactiveRanges(Variable *Cur); | |
| 65 void filterFreeWithPrecoloredRanges(Variable *Cur); | |
| 66 void allocatePrecoloredRegister(Variable *Cur); | |
| 67 void allocatePreferedRegister(Variable *Cur); | |
|
Jim Stichnoth
2015/08/24 15:08:31
Preferred
ascull
2015/08/24 19:53:48
Done.
| |
| 68 void allocateFreeRegister(Variable *Cur); | |
| 69 void handleNoFreeRegisters(Variable *Cur, llvm::SmallBitVector RegMask); | |
| 70 void assignFinalRegisters(llvm::SmallBitVector RegMaskFull, | |
| 71 llvm::SmallBitVector PreDefinedRegisters, | |
| 72 bool Randomized); | |
| 73 /// @} | |
| 74 | |
| 75 // TODO(stichnot): Statically choose the size based on the target being | |
| 76 // compiled. | |
| 77 static constexpr size_t REGS_SIZE = 32; | |
|
Jim Stichnoth
2015/08/24 15:08:31
Make this public, so that the Machine could potent
ascull
2015/08/24 19:53:48
Done.
| |
| 78 | |
| 57 Cfg *const Func; | 79 Cfg *const Func; |
| 80 GlobalContext *const Ctx; | |
| 81 const bool Verbose; | |
|
jvoung (off chromium)
2015/08/24 15:33:01
nit: Cluster some of the bools together for better
ascull
2015/08/24 19:53:47
Done.
| |
| 82 | |
| 58 OrderedRanges Unhandled; | 83 OrderedRanges Unhandled; |
| 59 /// UnhandledPrecolored is a subset of Unhandled, specially collected | 84 /// UnhandledPrecolored is a subset of Unhandled, specially collected for |
| 60 /// for faster processing. | 85 /// faster processing. |
| 61 OrderedRanges UnhandledPrecolored; | 86 OrderedRanges UnhandledPrecolored; |
| 62 UnorderedRanges Active, Inactive, Handled; | 87 UnorderedRanges Active, Inactive, Handled; |
| 63 std::vector<InstNumberT> Kills; | 88 std::vector<InstNumberT> Kills; |
| 64 RegAllocKind Kind = RAK_Unknown; | 89 RegAllocKind Kind = RAK_Unknown; |
| 65 bool FindPreference = false; | 90 bool FindPreference = false; |
| 66 bool FindOverlap = false; | 91 bool FindOverlap = false; |
| 92 | |
| 93 /// RegUses[I] is the number of live ranges (variables) that register I is | |
| 94 /// currently assigned to. It can be greater than 1 as a result of | |
| 95 /// AllowOverlap inference below. | |
|
Jim Stichnoth
2015/08/24 15:08:31
Probably just remove the word "below".
ascull
2015/08/24 19:53:47
Done.
| |
| 96 llvm::SmallVector<int, REGS_SIZE> RegUses; | |
|
Jim Stichnoth
2015/08/24 15:08:31
Can you change int to int32_t ?
ascull
2015/08/24 19:53:48
Done.
| |
| 97 | |
| 98 /// \name Iteration state | |
|
Jim Stichnoth
2015/08/24 15:08:31
I wonder if you could move the iteration-specific
ascull
2015/08/24 19:53:48
No need to go to the heap or pollute the class. Pu
| |
| 99 /// @{ | |
| 100 llvm::SmallBitVector Free; | |
| 101 llvm::SmallVector<RegWeight, REGS_SIZE> Weights; | |
| 102 llvm::SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping. | |
| 103 Variable *Prefer; | |
| 104 int32_t PreferReg; | |
| 105 bool AllowOverlap; | |
| 106 /// @} | |
| 67 }; | 107 }; |
| 68 | 108 |
| 69 } // end of namespace Ice | 109 } // end of namespace Ice |
| 70 | 110 |
| 71 #endif // SUBZERO_SRC_ICEREGALLOC_H | 111 #endif // SUBZERO_SRC_ICEREGALLOC_H |
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