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Unified Diff: src/ic/arm/ic-arm.cc

Issue 1303053004: Revert of Vector ICs: platform support for vector-based stores. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 3 months ago
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Index: src/ic/arm/ic-arm.cc
diff --git a/src/ic/arm/ic-arm.cc b/src/ic/arm/ic-arm.cc
index ea424c3b7dcfa21346421301b0be898e343cf8f4..a805f4ccee937eaf82dc70b0eb25776b99007803 100644
--- a/src/ic/arm/ic-arm.cc
+++ b/src/ic/arm/ic-arm.cc
@@ -692,20 +692,12 @@
__ ldrb(r4, FieldMemOperand(r4, Map::kInstanceTypeOffset));
__ JumpIfNotUniqueNameInstanceType(r4, &slow);
- // We use register r8 when FLAG_vector_stores is enabled, because otherwise
- // probing the megamorphic stub cache would require pushing temporaries on
- // the stack.
- // TODO(mvstanton): quit using register r8 when
- // FLAG_enable_embedded_constant_pool is turned on.
- DCHECK(!FLAG_vector_stores || !FLAG_enable_embedded_constant_pool);
- Register temporary2 = FLAG_vector_stores ? r8 : r4;
if (FLAG_vector_stores) {
// The handlers in the stub cache expect a vector and slot. Since we won't
// change the IC from any downstream misses, a dummy vector can be used.
Register vector = VectorStoreICDescriptor::VectorRegister();
Register slot = VectorStoreICDescriptor::SlotRegister();
-
- DCHECK(!AreAliased(vector, slot, r5, temporary2, r6, r9));
+ DCHECK(!AreAliased(vector, slot, r3, r4, r5, r6));
Handle<TypeFeedbackVector> dummy_vector =
TypeFeedbackVector::DummyVector(masm->isolate());
int slot_index = dummy_vector->GetIndex(
@@ -716,8 +708,8 @@
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::STORE_IC));
- masm->isolate()->stub_cache()->GenerateProbe(
- masm, Code::STORE_IC, flags, receiver, key, r5, temporary2, r6, r9);
+ masm->isolate()->stub_cache()->GenerateProbe(masm, Code::STORE_IC, flags,
+ receiver, key, r3, r4, r5, r6);
// Cache miss.
__ b(&miss);
@@ -800,24 +792,20 @@
Register receiver = StoreDescriptor::ReceiverRegister();
Register name = StoreDescriptor::NameRegister();
Register value = StoreDescriptor::ValueRegister();
- Register vector = VectorStoreICDescriptor::VectorRegister();
- Register slot = VectorStoreICDescriptor::SlotRegister();
- Register dictionary = r5;
+ Register dictionary = r3;
DCHECK(receiver.is(r1));
DCHECK(name.is(r2));
DCHECK(value.is(r0));
- DCHECK(vector.is(r3));
- DCHECK(slot.is(r4));
__ ldr(dictionary, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
- GenerateDictionaryStore(masm, &miss, dictionary, name, value, r6, r9);
+ GenerateDictionaryStore(masm, &miss, dictionary, name, value, r4, r5);
Counters* counters = masm->isolate()->counters();
- __ IncrementCounter(counters->store_normal_hit(), 1, r6, r9);
+ __ IncrementCounter(counters->store_normal_hit(), 1, r4, r5);
__ Ret();
__ bind(&miss);
- __ IncrementCounter(counters->store_normal_miss(), 1, r6, r9);
+ __ IncrementCounter(counters->store_normal_miss(), 1, r4, r5);
GenerateMiss(masm);
}
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