Fix handling unknown branches when parsing switch instructions.

src/PNaClTranslator.cpp

 //===- subzero/src/PNaClTranslator.cpp - ICE from bitcode -----------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 2397 matching lines @@
     } else if (CondTy != Cond->getType()) {
       std::string Buffer;
       raw_string_ostream StrBuf(Buffer);
       StrBuf << "Case condition expects type " << CondTy
              << ". Found: " << Cond->getType();
       Error(StrBuf.str());
       return;
     }
     Ice::CfgNode *DefaultLabel =
         isIRGenDisabled ? nullptr : getBranchBasicBlock(Values[2]);
+    if (DefaultLabel == nullptr)
+      return;
     uint64_t NumCasesRaw = Values[3];
     if (NumCasesRaw > std::numeric_limits<uint32_t>::max()) {
       std::string Buffer;
       raw_string_ostream StrBuf(Buffer);
       StrBuf << "Too many cases specified in switch: " << NumCasesRaw;
       Error(StrBuf.str());
       NumCasesRaw = std::numeric_limits<uint32_t>::max();
     }
     uint32_t NumCases = NumCasesRaw;
 
     // Now recognize each of the cases.
     if (!isValidRecordSize(4 + NumCases * 4, "switch"))
       return;
-    Ice::InstSwitch *Switch =
-        isIRGenDisabled
-            ? nullptr
-            : Ice::InstSwitch::create(Func.get(), NumCases, Cond, DefaultLabel);
+    std::unique_ptr<Ice::InstSwitch> Switch(
+        isIRGenDisabled ? nullptr
+                        : Ice::InstSwitch::create(Func.get(), NumCases, Cond,
+                                                  DefaultLabel));
     unsigned ValCaseIndex = 4; // index to beginning of case entry.
     for (uint32_t CaseIndex = 0; CaseIndex < NumCases;
          ++CaseIndex, ValCaseIndex += 4) {
       if (Values[ValCaseIndex] != 1 || Values[ValCaseIndex + 1] != 1) {
         std::string Buffer;
         raw_string_ostream StrBuf(Buffer);
         StrBuf << "Sequence [1, 1, value, label] expected for case entry "
                << "in switch record. (at index" << ValCaseIndex << ")";
         Error(StrBuf.str());
         return;
       }
       Ice::APInt Value(BitWidth,
                        NaClDecodeSignRotatedValue(Values[ValCaseIndex + 2]));
       if (isIRGenDisabled)
         continue;
       Ice::CfgNode *Label = getBranchBasicBlock(Values[ValCaseIndex + 3]);
+      if (Label == nullptr)
+        return;
       Switch->addBranch(CaseIndex, Value.getSExtValue(), Label);
     }
     if (isIRGenDisabled)
       return;
-    CurrentNode->appendInst(Switch);
+    CurrentNode->appendInst(Switch.release());
     return;
   }
   case naclbitc::FUNC_CODE_INST_UNREACHABLE: {
     // UNREACHABLE: []
     InstIsTerminating = true;
     if (!isValidRecordSize(0, "unreachable"))
       return;
     if (isIRGenerationDisabled())
       return;
     CurrentNode->appendInst(Ice::InstUnreachable::create(Func.get()));
@@ skipping 701 matching lines @@
   }
   if (InputStreamFile.getBitcodeBytes().getExtent() % 4 != 0) {
     ErrStream
         << IRFilename
         << ": Bitcode stream should be a multiple of 4 bytes in length.\n";
     llvm::report_fatal_error("Bitcode stream should be a multiple of 4 bytes");
   }
 }
 
 } // end of namespace Ice