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Unified Diff: source/libvpx/vpx_dsp/arm/idct16x16_neon.c

Issue 1302353004: libvpx: Pull from upstream (Closed) Base URL: https://chromium.googlesource.com/chromium/deps/libvpx.git@master
Patch Set: Created 5 years, 4 months ago
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Index: source/libvpx/vpx_dsp/arm/idct16x16_neon.c
diff --git a/source/libvpx/vpx_dsp/arm/idct16x16_neon.c b/source/libvpx/vpx_dsp/arm/idct16x16_neon.c
index ac9f348bc7bf6d0bc69fe5a5f9c9c008393020c4..352979aa16f7613c4a4d6c176095921be08a61a5 100644
--- a/source/libvpx/vpx_dsp/arm/idct16x16_neon.c
+++ b/source/libvpx/vpx_dsp/arm/idct16x16_neon.c
@@ -8,21 +8,21 @@
* be found in the AUTHORS file in the root of the source tree.
*/
-#include "vp9/common/vp9_common.h"
+#include "vpx_dsp/vpx_dsp_common.h"
-void vp9_idct16x16_256_add_neon_pass1(const int16_t *input,
+void vpx_idct16x16_256_add_neon_pass1(const int16_t *input,
int16_t *output,
int output_stride);
-void vp9_idct16x16_256_add_neon_pass2(const int16_t *src,
+void vpx_idct16x16_256_add_neon_pass2(const int16_t *src,
int16_t *output,
int16_t *pass1Output,
int16_t skip_adding,
uint8_t *dest,
int dest_stride);
-void vp9_idct16x16_10_add_neon_pass1(const int16_t *input,
+void vpx_idct16x16_10_add_neon_pass1(const int16_t *input,
int16_t *output,
int output_stride);
-void vp9_idct16x16_10_add_neon_pass2(const int16_t *src,
+void vpx_idct16x16_10_add_neon_pass2(const int16_t *src,
int16_t *output,
int16_t *pass1Output,
int16_t skip_adding,
@@ -31,11 +31,11 @@ void vp9_idct16x16_10_add_neon_pass2(const int16_t *src,
#if HAVE_NEON_ASM
/* For ARM NEON, d8-d15 are callee-saved registers, and need to be saved. */
-extern void vp9_push_neon(int64_t *store);
-extern void vp9_pop_neon(int64_t *store);
+extern void vpx_push_neon(int64_t *store);
+extern void vpx_pop_neon(int64_t *store);
#endif // HAVE_NEON_ASM
-void vp9_idct16x16_256_add_neon(const int16_t *input,
+void vpx_idct16x16_256_add_neon(const int16_t *input,
uint8_t *dest, int dest_stride) {
#if HAVE_NEON_ASM
int64_t store_reg[8];
@@ -45,18 +45,18 @@ void vp9_idct16x16_256_add_neon(const int16_t *input,
#if HAVE_NEON_ASM
// save d8-d15 register values.
- vp9_push_neon(store_reg);
+ vpx_push_neon(store_reg);
#endif
/* Parallel idct on the upper 8 rows */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(input, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(input, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7
// which will be saved into row_idct_output.
- vp9_idct16x16_256_add_neon_pass2(input+1,
+ vpx_idct16x16_256_add_neon_pass2(input+1,
row_idct_output,
pass1_output,
0,
@@ -66,12 +66,12 @@ void vp9_idct16x16_256_add_neon(const int16_t *input,
/* Parallel idct on the lower 8 rows */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(input+8*16, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(input+8*16, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7
// which will be saved into row_idct_output.
- vp9_idct16x16_256_add_neon_pass2(input+8*16+1,
+ vpx_idct16x16_256_add_neon_pass2(input+8*16+1,
row_idct_output+8,
pass1_output,
0,
@@ -81,12 +81,12 @@ void vp9_idct16x16_256_add_neon(const int16_t *input,
/* Parallel idct on the left 8 columns */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(row_idct_output, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(row_idct_output, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7.
// Then add the result to the destination data.
- vp9_idct16x16_256_add_neon_pass2(row_idct_output+1,
+ vpx_idct16x16_256_add_neon_pass2(row_idct_output+1,
row_idct_output,
pass1_output,
1,
@@ -96,12 +96,12 @@ void vp9_idct16x16_256_add_neon(const int16_t *input,
/* Parallel idct on the right 8 columns */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(row_idct_output+8*16, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(row_idct_output+8*16, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7.
// Then add the result to the destination data.
- vp9_idct16x16_256_add_neon_pass2(row_idct_output+8*16+1,
+ vpx_idct16x16_256_add_neon_pass2(row_idct_output+8*16+1,
row_idct_output+8,
pass1_output,
1,
@@ -110,13 +110,13 @@ void vp9_idct16x16_256_add_neon(const int16_t *input,
#if HAVE_NEON_ASM
// restore d8-d15 register values.
- vp9_pop_neon(store_reg);
+ vpx_pop_neon(store_reg);
#endif
return;
}
-void vp9_idct16x16_10_add_neon(const int16_t *input,
+void vpx_idct16x16_10_add_neon(const int16_t *input,
uint8_t *dest, int dest_stride) {
#if HAVE_NEON_ASM
int64_t store_reg[8];
@@ -126,18 +126,18 @@ void vp9_idct16x16_10_add_neon(const int16_t *input,
#if HAVE_NEON_ASM
// save d8-d15 register values.
- vp9_push_neon(store_reg);
+ vpx_push_neon(store_reg);
#endif
/* Parallel idct on the upper 8 rows */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_10_add_neon_pass1(input, pass1_output, 8);
+ vpx_idct16x16_10_add_neon_pass1(input, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7
// which will be saved into row_idct_output.
- vp9_idct16x16_10_add_neon_pass2(input+1,
+ vpx_idct16x16_10_add_neon_pass2(input+1,
row_idct_output,
pass1_output,
0,
@@ -149,12 +149,12 @@ void vp9_idct16x16_10_add_neon(const int16_t *input,
/* Parallel idct on the left 8 columns */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(row_idct_output, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(row_idct_output, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7.
// Then add the result to the destination data.
- vp9_idct16x16_256_add_neon_pass2(row_idct_output+1,
+ vpx_idct16x16_256_add_neon_pass2(row_idct_output+1,
row_idct_output,
pass1_output,
1,
@@ -164,12 +164,12 @@ void vp9_idct16x16_10_add_neon(const int16_t *input,
/* Parallel idct on the right 8 columns */
// First pass processes even elements 0, 2, 4, 6, 8, 10, 12, 14 and save the
// stage 6 result in pass1_output.
- vp9_idct16x16_256_add_neon_pass1(row_idct_output+8*16, pass1_output, 8);
+ vpx_idct16x16_256_add_neon_pass1(row_idct_output+8*16, pass1_output, 8);
// Second pass processes odd elements 1, 3, 5, 7, 9, 11, 13, 15 and combines
// with result in pass1(pass1_output) to calculate final result in stage 7.
// Then add the result to the destination data.
- vp9_idct16x16_256_add_neon_pass2(row_idct_output+8*16+1,
+ vpx_idct16x16_256_add_neon_pass2(row_idct_output+8*16+1,
row_idct_output+8,
pass1_output,
1,
@@ -178,7 +178,7 @@ void vp9_idct16x16_10_add_neon(const int16_t *input,
#if HAVE_NEON_ASM
// restore d8-d15 register values.
- vp9_pop_neon(store_reg);
+ vpx_pop_neon(store_reg);
#endif
return;
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