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| 1 /* | 1 /* |
| 2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved. | 2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved. |
| 3 * | 3 * |
| 4 * Use of this source code is governed by a BSD-style license | 4 * Use of this source code is governed by a BSD-style license |
| 5 * that can be found in the LICENSE file in the root of the source | 5 * that can be found in the LICENSE file in the root of the source |
| 6 * tree. An additional intellectual property rights grant can be found | 6 * tree. An additional intellectual property rights grant can be found |
| 7 * in the file PATENTS. All contributing project authors may | 7 * in the file PATENTS. All contributing project authors may |
| 8 * be found in the AUTHORS file in the root of the source tree. | 8 * be found in the AUTHORS file in the root of the source tree. |
| 9 */ | 9 */ |
| 10 | 10 |
| (...skipping 152 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 163 // 01 11 21 31 41 51 61 71 | 163 // 01 11 21 31 41 51 61 71 |
| 164 // 02 12 22 32 42 52 62 72 | 164 // 02 12 22 32 42 52 62 72 |
| 165 // 03 13 23 33 43 53 63 73 | 165 // 03 13 23 33 43 53 63 73 |
| 166 // 04 14 24 34 44 54 64 74 | 166 // 04 14 24 34 44 54 64 74 |
| 167 // 05 15 25 35 45 55 65 75 | 167 // 05 15 25 35 45 55 65 75 |
| 168 // 06 16 26 36 46 56 66 76 | 168 // 06 16 26 36 46 56 66 76 |
| 169 // 07 17 27 37 47 57 67 77 | 169 // 07 17 27 37 47 57 67 77 |
| 170 } | 170 } |
| 171 } // for | 171 } // for |
| 172 { | 172 { |
| 173 // from vp9_dct_sse2.c | 173 // from vpx_dct_sse2.c |
| 174 // Post-condition (division by two) | 174 // Post-condition (division by two) |
| 175 // division of two 16 bits signed numbers using shifts | 175 // division of two 16 bits signed numbers using shifts |
| 176 // n / 2 = (n - (n >> 15)) >> 1 | 176 // n / 2 = (n - (n >> 15)) >> 1 |
| 177 const int16x8_t sign_in0 = vshrq_n_s16(input_0, 15); | 177 const int16x8_t sign_in0 = vshrq_n_s16(input_0, 15); |
| 178 const int16x8_t sign_in1 = vshrq_n_s16(input_1, 15); | 178 const int16x8_t sign_in1 = vshrq_n_s16(input_1, 15); |
| 179 const int16x8_t sign_in2 = vshrq_n_s16(input_2, 15); | 179 const int16x8_t sign_in2 = vshrq_n_s16(input_2, 15); |
| 180 const int16x8_t sign_in3 = vshrq_n_s16(input_3, 15); | 180 const int16x8_t sign_in3 = vshrq_n_s16(input_3, 15); |
| 181 const int16x8_t sign_in4 = vshrq_n_s16(input_4, 15); | 181 const int16x8_t sign_in4 = vshrq_n_s16(input_4, 15); |
| 182 const int16x8_t sign_in5 = vshrq_n_s16(input_5, 15); | 182 const int16x8_t sign_in5 = vshrq_n_s16(input_5, 15); |
| 183 const int16x8_t sign_in6 = vshrq_n_s16(input_6, 15); | 183 const int16x8_t sign_in6 = vshrq_n_s16(input_6, 15); |
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| 211 } | 211 } |
| 212 { | 212 { |
| 213 const int32x4_t a = vpaddlq_s16(sum); | 213 const int32x4_t a = vpaddlq_s16(sum); |
| 214 const int64x2_t b = vpaddlq_s32(a); | 214 const int64x2_t b = vpaddlq_s32(a); |
| 215 const int32x2_t c = vadd_s32(vreinterpret_s32_s64(vget_low_s64(b)), | 215 const int32x2_t c = vadd_s32(vreinterpret_s32_s64(vget_low_s64(b)), |
| 216 vreinterpret_s32_s64(vget_high_s64(b))); | 216 vreinterpret_s32_s64(vget_high_s64(b))); |
| 217 output[0] = vget_lane_s16(vreinterpret_s16_s32(c), 0); | 217 output[0] = vget_lane_s16(vreinterpret_s16_s32(c), 0); |
| 218 output[1] = 0; | 218 output[1] = 0; |
| 219 } | 219 } |
| 220 } | 220 } |
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