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1 /* | 1 /* |
2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved. | 2 * Copyright (c) 2015 The WebM project authors. All Rights Reserved. |
3 * | 3 * |
4 * Use of this source code is governed by a BSD-style license | 4 * Use of this source code is governed by a BSD-style license |
5 * that can be found in the LICENSE file in the root of the source | 5 * that can be found in the LICENSE file in the root of the source |
6 * tree. An additional intellectual property rights grant can be found | 6 * tree. An additional intellectual property rights grant can be found |
7 * in the file PATENTS. All contributing project authors may | 7 * in the file PATENTS. All contributing project authors may |
8 * be found in the AUTHORS file in the root of the source tree. | 8 * be found in the AUTHORS file in the root of the source tree. |
9 */ | 9 */ |
10 | 10 |
11 #include <assert.h> | 11 #include <assert.h> |
12 | 12 |
13 #include "vp9/common/vp9_enums.h" | 13 #include "vp9/common/vp9_enums.h" |
14 #include "vpx_dsp/mips/inv_txfm_msa.h" | 14 #include "vpx_dsp/mips/inv_txfm_msa.h" |
15 | 15 |
16 void vp9_iht16x16_256_add_msa(const int16_t *input, uint8_t *dst, | 16 void vp9_iht16x16_256_add_msa(const int16_t *input, uint8_t *dst, |
17 int32_t dst_stride, int32_t tx_type) { | 17 int32_t dst_stride, int32_t tx_type) { |
18 int32_t i; | 18 int32_t i; |
19 DECLARE_ALIGNED(32, int16_t, out[16 * 16]); | 19 DECLARE_ALIGNED(32, int16_t, out[16 * 16]); |
20 int16_t *out_ptr = &out[0]; | 20 int16_t *out_ptr = &out[0]; |
21 | 21 |
22 switch (tx_type) { | 22 switch (tx_type) { |
23 case DCT_DCT: | 23 case DCT_DCT: |
24 /* transform rows */ | 24 /* transform rows */ |
25 for (i = 0; i < 2; ++i) { | 25 for (i = 0; i < 2; ++i) { |
26 /* process 16 * 8 block */ | 26 /* process 16 * 8 block */ |
27 vp9_idct16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); | 27 vpx_idct16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); |
28 } | 28 } |
29 | 29 |
30 /* transform columns */ | 30 /* transform columns */ |
31 for (i = 0; i < 2; ++i) { | 31 for (i = 0; i < 2; ++i) { |
32 /* process 8 * 16 block */ | 32 /* process 8 * 16 block */ |
33 vp9_idct16_1d_columns_addblk_msa((out_ptr + (i << 3)), (dst + (i << 3)), | 33 vpx_idct16_1d_columns_addblk_msa((out_ptr + (i << 3)), (dst + (i << 3)), |
34 dst_stride); | 34 dst_stride); |
35 } | 35 } |
36 break; | 36 break; |
37 case ADST_DCT: | 37 case ADST_DCT: |
38 /* transform rows */ | 38 /* transform rows */ |
39 for (i = 0; i < 2; ++i) { | 39 for (i = 0; i < 2; ++i) { |
40 /* process 16 * 8 block */ | 40 /* process 16 * 8 block */ |
41 vp9_idct16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); | 41 vpx_idct16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); |
42 } | 42 } |
43 | 43 |
44 /* transform columns */ | 44 /* transform columns */ |
45 for (i = 0; i < 2; ++i) { | 45 for (i = 0; i < 2; ++i) { |
46 vp9_iadst16_1d_columns_addblk_msa((out_ptr + (i << 3)), | 46 vpx_iadst16_1d_columns_addblk_msa((out_ptr + (i << 3)), |
47 (dst + (i << 3)), dst_stride); | 47 (dst + (i << 3)), dst_stride); |
48 } | 48 } |
49 break; | 49 break; |
50 case DCT_ADST: | 50 case DCT_ADST: |
51 /* transform rows */ | 51 /* transform rows */ |
52 for (i = 0; i < 2; ++i) { | 52 for (i = 0; i < 2; ++i) { |
53 /* process 16 * 8 block */ | 53 /* process 16 * 8 block */ |
54 vp9_iadst16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); | 54 vpx_iadst16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); |
55 } | 55 } |
56 | 56 |
57 /* transform columns */ | 57 /* transform columns */ |
58 for (i = 0; i < 2; ++i) { | 58 for (i = 0; i < 2; ++i) { |
59 /* process 8 * 16 block */ | 59 /* process 8 * 16 block */ |
60 vp9_idct16_1d_columns_addblk_msa((out_ptr + (i << 3)), (dst + (i << 3)), | 60 vpx_idct16_1d_columns_addblk_msa((out_ptr + (i << 3)), (dst + (i << 3)), |
61 dst_stride); | 61 dst_stride); |
62 } | 62 } |
63 break; | 63 break; |
64 case ADST_ADST: | 64 case ADST_ADST: |
65 /* transform rows */ | 65 /* transform rows */ |
66 for (i = 0; i < 2; ++i) { | 66 for (i = 0; i < 2; ++i) { |
67 /* process 16 * 8 block */ | 67 /* process 16 * 8 block */ |
68 vp9_iadst16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); | 68 vpx_iadst16_1d_rows_msa((input + (i << 7)), (out_ptr + (i << 7))); |
69 } | 69 } |
70 | 70 |
71 /* transform columns */ | 71 /* transform columns */ |
72 for (i = 0; i < 2; ++i) { | 72 for (i = 0; i < 2; ++i) { |
73 vp9_iadst16_1d_columns_addblk_msa((out_ptr + (i << 3)), | 73 vpx_iadst16_1d_columns_addblk_msa((out_ptr + (i << 3)), |
74 (dst + (i << 3)), dst_stride); | 74 (dst + (i << 3)), dst_stride); |
75 } | 75 } |
76 break; | 76 break; |
77 default: | 77 default: |
78 assert(0); | 78 assert(0); |
79 break; | 79 break; |
80 } | 80 } |
81 } | 81 } |
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