| Index: src/IceTargetLoweringARM32.cpp
|
| diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
|
| index 14fa072ee0cec5386201c29c44d376d7a7826229..c3d05a21202fca9b0a3f64e5341a30595983186f 100644
|
| --- a/src/IceTargetLoweringARM32.cpp
|
| +++ b/src/IceTargetLoweringARM32.cpp
|
| @@ -2505,9 +2505,10 @@ void TargetARM32::doAddressOptLoad() {
|
| UnimplementedError(Func->getContext()->getFlags());
|
| }
|
|
|
| -void TargetARM32::randomlyInsertNop(float Probability) {
|
| - RandomNumberGeneratorWrapper RNG(Ctx->getRNG());
|
| - if (RNG.getTrueWithProbability(Probability)) {
|
| +void TargetARM32::randomlyInsertNop(float Probability,
|
| + RandomNumberGenerator &RNG) {
|
| + RandomNumberGeneratorWrapper RNGW(RNG);
|
| + if (RNGW.getTrueWithProbability(Probability)) {
|
| UnimplementedError(Func->getContext()->getFlags());
|
| }
|
| }
|
| @@ -2929,9 +2930,10 @@ void TargetARM32::postLower() {
|
|
|
| void TargetARM32::makeRandomRegisterPermutation(
|
| llvm::SmallVectorImpl<int32_t> &Permutation,
|
| - const llvm::SmallBitVector &ExcludeRegisters) const {
|
| + const llvm::SmallBitVector &ExcludeRegisters, uint64_t Salt) const {
|
| (void)Permutation;
|
| (void)ExcludeRegisters;
|
| + (void)Salt;
|
| UnimplementedError(Func->getContext()->getFlags());
|
| }
|
|
|
|
|