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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/constants_arm.h" | 9 #include "vm/constants_arm.h" |
10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
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38 const ARMVersion version = TargetCPUFeatures::arm_version(); | 38 const ARMVersion version = TargetCPUFeatures::arm_version(); |
39 if ((version == ARMv5TE) || (version == ARMv6)) { | 39 if ((version == ARMv5TE) || (version == ARMv6)) { |
40 return 5 * Instr::kInstrSize; | 40 return 5 * Instr::kInstrSize; |
41 } else { | 41 } else { |
42 ASSERT(version == ARMv7); | 42 ASSERT(version == ARMv7); |
43 return 3 * Instr::kInstrSize; | 43 return 3 * Instr::kInstrSize; |
44 } | 44 } |
45 } | 45 } |
46 | 46 |
47 | 47 |
| 48 NativeCallPattern::NativeCallPattern(uword pc, const Code& code) |
| 49 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), |
| 50 end_(pc), |
| 51 native_function_pool_index_(-1), |
| 52 target_address_pool_index_(-1) { |
| 53 ASSERT(code.ContainsInstructionAt(pc)); |
| 54 // Last instruction: blx lr. |
| 55 ASSERT(*(reinterpret_cast<uword*>(end_) - 1) == 0xe12fff3e); |
| 56 |
| 57 Register reg; |
| 58 uword native_function_load_end = |
| 59 InstructionPattern::DecodeLoadWordFromPool(end_ - Instr::kInstrSize, |
| 60 ®, |
| 61 &target_address_pool_index_); |
| 62 ASSERT(reg == LR); |
| 63 InstructionPattern::DecodeLoadWordFromPool(native_function_load_end, |
| 64 ®, |
| 65 &native_function_pool_index_); |
| 66 ASSERT(reg == R5); |
| 67 } |
| 68 |
| 69 |
| 70 uword NativeCallPattern::target() const { |
| 71 return object_pool_.RawValueAt(target_address_pool_index_); |
| 72 } |
| 73 |
| 74 |
| 75 void NativeCallPattern::set_target(uword target_address) const { |
| 76 object_pool_.SetRawValueAt(target_address_pool_index_, target_address); |
| 77 // No need to flush the instruction cache, since the code is not modified. |
| 78 } |
| 79 |
| 80 |
| 81 NativeFunction NativeCallPattern::native_function() const { |
| 82 return reinterpret_cast<NativeFunction>( |
| 83 object_pool_.RawValueAt(native_function_pool_index_)); |
| 84 } |
| 85 |
| 86 |
| 87 void NativeCallPattern::set_native_function(NativeFunction func) const { |
| 88 object_pool_.SetRawValueAt(native_function_pool_index_, |
| 89 reinterpret_cast<uword>(func)); |
| 90 } |
| 91 |
| 92 |
48 // Decodes a load sequence ending at 'end' (the last instruction of the load | 93 // Decodes a load sequence ending at 'end' (the last instruction of the load |
49 // sequence is the instruction before the one at end). Returns a pointer to | 94 // sequence is the instruction before the one at end). Returns a pointer to |
50 // the first instruction in the sequence. Returns the register being loaded | 95 // the first instruction in the sequence. Returns the register being loaded |
51 // and the loaded object in the output parameters 'reg' and 'obj' | 96 // and the loaded object in the output parameters 'reg' and 'obj' |
52 // respectively. | 97 // respectively. |
53 uword InstructionPattern::DecodeLoadObject(uword end, | 98 uword InstructionPattern::DecodeLoadObject(uword end, |
54 const ObjectPool& object_pool, | 99 const ObjectPool& object_pool, |
55 Register* reg, | 100 Register* reg, |
56 Object* obj) { | 101 Object* obj) { |
57 uword start = 0; | 102 uword start = 0; |
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356 } else { | 401 } else { |
357 ASSERT(version == ARMv7); | 402 ASSERT(version == ARMv7); |
358 return bx_lr->InstructionBits() == instruction; | 403 return bx_lr->InstructionBits() == instruction; |
359 } | 404 } |
360 return false; | 405 return false; |
361 } | 406 } |
362 | 407 |
363 } // namespace dart | 408 } // namespace dart |
364 | 409 |
365 #endif // defined TARGET_ARCH_ARM | 410 #endif // defined TARGET_ARCH_ARM |
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