Cherry pick MIPS build fix

source/libvpx/vpx_util/endian_inl.h

Index: source/libvpx/vpx_util/endian_inl.h
diff --git a/source/libvpx/vpx_util/endian_inl.h b/source/libvpx/vpx_util/endian_inl.h
index 12cc720a419a9c1dae5e55ab70ec8c777591c9c0..6b177f174eec2d24d7b532df7112fb84bd2ffb16 100644
--- a/source/libvpx/vpx_util/endian_inl.h
+++ b/source/libvpx/vpx_util/endian_inl.h
@@ -63,6 +63,11 @@
 #define HAVE_BUILTIN_BSWAP16
 #endif
 
+#if HAVE_MIPS32 && defined(__mips__) && !defined(__mips64) && \
+    defined(__mips_isa_rev) && (__mips_isa_rev >= 2) && (__mips_isa_rev < 6)
+#define VPX_USE_MIPS32_R2
+#endif
+
 static INLINE uint16_t BSwap16(uint16_t x) {
 #if defined(HAVE_BUILTIN_BSWAP16)
   return __builtin_bswap16(x);
@@ -75,7 +80,7 @@ static INLINE uint16_t BSwap16(uint16_t x) {
 }
 
 static INLINE uint32_t BSwap32(uint32_t x) {
-#if HAVE_MIPS32
+#if defined(VPX_USE_MIPS32_R2)
   uint32_t ret;
   __asm__ volatile (
     "wsbh   %[ret], %[x]          \n\t"