Use generated Neon version of MemCopy() on ARM, if platform supports it.

src/arm/assembler-arm.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions
 // are met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 422 matching lines @@
   p8  = 8,
   p9  = 9,
   p10 = 10,
   p11 = 11,
   p12 = 12,
   p13 = 13,
   p14 = 14,
   p15 = 15
 };
 
+enum NeonElementIndex {
+  element_0 = 0,
+  element_1 = 1,
+  element_2 = 2,
+  element_3 = 3,
+  element_4 = 4,
+  element_5 = 5,
+  element_6 = 6,
+  element_7 = 7
+};
 
+enum NeonWritebackType {
+  Writeback = 0,
+  NoWriteback = 1
+};

[danno, 2013/03/27 08:40:07]

nit: add a empty line after this enum

[Nike, 2013/03/29 08:48:52]

Done.

 // -----------------------------------------------------------------------------
 // Machine instruction Operands
 
 // Class Operand represents a shifter operand in data processing instructions
 class Operand BASE_EMBEDDED {
  public:
   // immediate
   INLINE(explicit Operand(int32_t immediate,
          RelocInfo::Mode rmode = RelocInfo::NONE32));
   INLINE(static Operand Zero()) {
@@ skipping 434 matching lines @@
             Register dst2,
             const MemOperand& src, Condition cond = al);
   void strd(Register src1,
             Register src2,
             const MemOperand& dst, Condition cond = al);
 
   // Load/Store multiple instructions
   void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al);
   void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);
 
+  // Prefetch instructions.
+  void pld(Register base, int offset = 0, int write = 0);
+
   // Exception-generating instructions and debugging support
   void stop(const char* msg,
             Condition cond = al,
             int32_t code = kDefaultStopCode);
 
   void bkpt(uint32_t imm16);  // v5 and above
   void svc(uint32_t imm24, Condition cond = al);
 
   // Coprocessor instructions
 
@@ skipping 183 matching lines @@
             const double src2,
             const Condition cond = al);
   void vmrs(const Register dst,
             const Condition cond = al);
   void vmsr(const Register dst,
             const Condition cond = al);
   void vsqrt(const DwVfpRegister dst,
              const DwVfpRegister src,
              const Condition cond = al);
 
+  // NEON instructions
+  void vld1(int size,
+            const Register base,
+            const DwVfpRegister first,
+            const DwVfpRegister last,
+            NeonWritebackType writeback = NoWriteback,
+            int align_bytes = 1);
+  void vld1(int size,
+            const Register base,
+            const DwVfpRegister first,
+            NeonElementIndex element_index,
+            NeonWritebackType writeback = NoWriteback,
+            int align_bytes = 1);
+  void vld4(int size,
+            const Register src,
+            const DwVfpRegister first,
+            const DwVfpRegister last,
+            NeonWritebackType writeback = NoWriteback,
+            int align_bytes = 1);
+  void vld4(int size,
+            const Register src,
+            const DwVfpRegister first,
+            NeonElementIndex element_index,
+            NeonWritebackType writeback = NoWriteback,
+            int align_bytes = 1);
+  void vst1(int size,
+              const Register base,

[danno, 2013/03/27 08:40:07]

nit: parameter indentation here and below, please follow Google C++ coding
style. 

[Nike, 2013/03/29 08:48:52]

Done.

+              const DwVfpRegister first,
+              const DwVfpRegister last,
+              NeonWritebackType writeback = NoWriteback,
+              int align_bytes = 1);
+  void vst1(int size,
+              const Register base,
+              const DwVfpRegister first,
+              NeonElementIndex element_index,
+              NeonWritebackType writeback = NoWriteback,
+              int align_bytes = 1);
+  void vst4(int size,
+              const Register src,
+              const DwVfpRegister first,
+              const DwVfpRegister last,
+              NeonWritebackType writeback = NoWriteback,
+              int align_bytes = 1);
+  void vst4(int size,
+              const Register src,
+              const DwVfpRegister first,
+              NeonElementIndex element_index,
+              NeonWritebackType writeback = NoWriteback,
+              int align_bytes = 1);
+
   // Pseudo instructions
 
   // Different nop operations are used by the code generator to detect certain
   // states of the generated code.
   enum NopMarkerTypes {
     NON_MARKING_NOP = 0,
     DEBUG_BREAK_NOP,
     // IC markers.
     PROPERTY_ACCESS_INLINED,
     PROPERTY_ACCESS_INLINED_CONTEXT,
@@ skipping 332 matching lines @@
  public:
   explicit EnsureSpace(Assembler* assembler) {
     assembler->CheckBuffer();
   }
 };
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_ARM_ASSEMBLER_ARM_H_