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Issue 12920009: Use generated Neon version of MemCopy() on ARM, if platform supports it. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: Created 7 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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433 p8 = 8, 433 p8 = 8,
434 p9 = 9, 434 p9 = 9,
435 p10 = 10, 435 p10 = 10,
436 p11 = 11, 436 p11 = 11,
437 p12 = 12, 437 p12 = 12,
438 p13 = 13, 438 p13 = 13,
439 p14 = 14, 439 p14 = 14,
440 p15 = 15 440 p15 = 15
441 }; 441 };
442 442
443 enum NeonElementIndex {
444 element_0 = 0,
445 element_1 = 1,
446 element_2 = 2,
447 element_3 = 3,
448 element_4 = 4,
449 element_5 = 5,
450 element_6 = 6,
451 element_7 = 7
452 };
453
454 enum NeonWritebackType {
455 Writeback = 0,
456 NoWriteback = 1
457 };
443 458
444 // ----------------------------------------------------------------------------- 459 // -----------------------------------------------------------------------------
445 // Machine instruction Operands 460 // Machine instruction Operands
446 461
447 // Class Operand represents a shifter operand in data processing instructions 462 // Class Operand represents a shifter operand in data processing instructions
448 class Operand BASE_EMBEDDED { 463 class Operand BASE_EMBEDDED {
449 public: 464 public:
450 // immediate 465 // immediate
451 INLINE(explicit Operand(int32_t immediate, 466 INLINE(explicit Operand(int32_t immediate,
452 RelocInfo::Mode rmode = RelocInfo::NONE32)); 467 RelocInfo::Mode rmode = RelocInfo::NONE32));
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888 Register dst2, 903 Register dst2,
889 const MemOperand& src, Condition cond = al); 904 const MemOperand& src, Condition cond = al);
890 void strd(Register src1, 905 void strd(Register src1,
891 Register src2, 906 Register src2,
892 const MemOperand& dst, Condition cond = al); 907 const MemOperand& dst, Condition cond = al);
893 908
894 // Load/Store multiple instructions 909 // Load/Store multiple instructions
895 void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al); 910 void ldm(BlockAddrMode am, Register base, RegList dst, Condition cond = al);
896 void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al); 911 void stm(BlockAddrMode am, Register base, RegList src, Condition cond = al);
897 912
913 // Prefetch instructions.
914 void pld(Register base, int offset = 0, int write = 0);
915
898 // Exception-generating instructions and debugging support 916 // Exception-generating instructions and debugging support
899 void stop(const char* msg, 917 void stop(const char* msg,
900 Condition cond = al, 918 Condition cond = al,
901 int32_t code = kDefaultStopCode); 919 int32_t code = kDefaultStopCode);
902 920
903 void bkpt(uint32_t imm16); // v5 and above 921 void bkpt(uint32_t imm16); // v5 and above
904 void svc(uint32_t imm24, Condition cond = al); 922 void svc(uint32_t imm24, Condition cond = al);
905 923
906 // Coprocessor instructions 924 // Coprocessor instructions
907 925
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1091 const double src2, 1109 const double src2,
1092 const Condition cond = al); 1110 const Condition cond = al);
1093 void vmrs(const Register dst, 1111 void vmrs(const Register dst,
1094 const Condition cond = al); 1112 const Condition cond = al);
1095 void vmsr(const Register dst, 1113 void vmsr(const Register dst,
1096 const Condition cond = al); 1114 const Condition cond = al);
1097 void vsqrt(const DwVfpRegister dst, 1115 void vsqrt(const DwVfpRegister dst,
1098 const DwVfpRegister src, 1116 const DwVfpRegister src,
1099 const Condition cond = al); 1117 const Condition cond = al);
1100 1118
1119 // NEON instructions
1120 void vld1(int size,
1121 const Register base,
1122 const DwVfpRegister first,
1123 const DwVfpRegister last,
1124 NeonWritebackType writeback = NoWriteback,
1125 int align_bytes = 1);
1126 void vld1(int size,
1127 const Register base,
1128 const DwVfpRegister first,
1129 NeonElementIndex element_index,
1130 NeonWritebackType writeback = NoWriteback,
1131 int align_bytes = 1);
1132 void vld4(int size,
1133 const Register src,
1134 const DwVfpRegister first,
1135 const DwVfpRegister last,
1136 NeonWritebackType writeback = NoWriteback,
1137 int align_bytes = 1);
1138 void vld4(int size,
1139 const Register src,
1140 const DwVfpRegister first,
1141 NeonElementIndex element_index,
1142 NeonWritebackType writeback = NoWriteback,
1143 int align_bytes = 1);
1144 void vst1(int size,
1145 const Register base,
1146 const DwVfpRegister first,
1147 const DwVfpRegister last,
1148 NeonWritebackType writeback = NoWriteback,
1149 int align_bytes = 1);
1150 void vst1(int size,
1151 const Register base,
1152 const DwVfpRegister first,
1153 NeonElementIndex element_index,
1154 NeonWritebackType writeback = NoWriteback,
1155 int align_bytes = 1);
1156 void vst4(int size,
1157 const Register src,
1158 const DwVfpRegister first,
1159 const DwVfpRegister last,
1160 NeonWritebackType writeback = NoWriteback,
1161 int align_bytes = 1);
1162 void vst4(int size,
1163 const Register src,
1164 const DwVfpRegister first,
1165 NeonElementIndex element_index,
1166 NeonWritebackType writeback = NoWriteback,
1167 int align_bytes = 1);
1168
1101 // Pseudo instructions 1169 // Pseudo instructions
1102 1170
1103 // Different nop operations are used by the code generator to detect certain 1171 // Different nop operations are used by the code generator to detect certain
1104 // states of the generated code. 1172 // states of the generated code.
1105 enum NopMarkerTypes { 1173 enum NopMarkerTypes {
1106 NON_MARKING_NOP = 0, 1174 NON_MARKING_NOP = 0,
1107 DEBUG_BREAK_NOP, 1175 DEBUG_BREAK_NOP,
1108 // IC markers. 1176 // IC markers.
1109 PROPERTY_ACCESS_INLINED, 1177 PROPERTY_ACCESS_INLINED,
1110 PROPERTY_ACCESS_INLINED_CONTEXT, 1178 PROPERTY_ACCESS_INLINED_CONTEXT,
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1443 public: 1511 public:
1444 explicit EnsureSpace(Assembler* assembler) { 1512 explicit EnsureSpace(Assembler* assembler) {
1445 assembler->CheckBuffer(); 1513 assembler->CheckBuffer();
1446 } 1514 }
1447 }; 1515 };
1448 1516
1449 1517
1450 } } // namespace v8::internal 1518 } } // namespace v8::internal
1451 1519
1452 #endif // V8_ARM_ASSEMBLER_ARM_H_ 1520 #endif // V8_ARM_ASSEMBLER_ARM_H_
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