Add build targets for advanced Intel instruction sets (1 of 3).

include/core/SkPreConfig.h

Index: include/core/SkPreConfig.h
diff --git a/include/core/SkPreConfig.h b/include/core/SkPreConfig.h
index 7a849f566e954d10f5c854f09b41a9f5582c4a16..0c720010f74a0a26c65daf1f30744cb0645ada7f 100644
--- a/include/core/SkPreConfig.h
+++ b/include/core/SkPreConfig.h
@@ -114,12 +114,18 @@
 #define SK_CPU_SSE_LEVEL_SSSE3    31
 #define SK_CPU_SSE_LEVEL_SSE41    41
 #define SK_CPU_SSE_LEVEL_SSE42    42
+#define SK_CPU_SSE_LEVEL_AVX      51
+#define SK_CPU_SSE_LEVEL_AVX2     52
 
 // Are we in GCC?
 #ifndef SK_CPU_SSE_LEVEL
     // These checks must be done in descending order to ensure we set the highest
     // available SSE level.
-    #if defined(__SSE4_2__)
+    #if defined(__AVX2__)
+        #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX2
+    #elif defined(__AVX__)
+        #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX
+    #elif defined(__SSE4_2__)
         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE42
     #elif defined(__SSE4_1__)
         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE41
@@ -136,9 +142,13 @@
 #ifndef SK_CPU_SSE_LEVEL
     // These checks must be done in descending order to ensure we set the highest
     // available SSE level. 64-bit intel guarantees at least SSE2 support.
-    #if defined(_M_X64) || defined(_M_AMD64)
-        #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE2
-    #elif defined (_M_IX86_FP)
+    #if defined(__AVX2__)
+        #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_AVX2
+    #elif defined(__AVX__)
+        #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_AVX
+    #elif defined(_M_X64) || defined(_M_AMD64)
+        #define SK_CPU_SSE_LEVEL        SK_CPU_SSE_LEVEL_SSE2
+    #elif defined(_M_IX86_FP)
         #if _M_IX86_FP >= 2
             #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_SSE2
         #elif _M_IX86_FP == 1