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Side by Side Diff: src/compiler/instruction-selector-impl.h

Issue 1287383003: Re-reland: Remove register index/code indirection (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix MIPS tests again Created 5 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_ 5 #ifndef V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
6 #define V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_ 6 #define V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
7 7
8 #include "src/compiler/instruction.h" 8 #include "src/compiler/instruction.h"
9 #include "src/compiler/instruction-selector.h" 9 #include "src/compiler/instruction-selector.h"
10 #include "src/compiler/linkage.h" 10 #include "src/compiler/linkage.h"
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44 } 44 }
45 45
46 InstructionOperand DefineSameAsFirst(Node* node) { 46 InstructionOperand DefineSameAsFirst(Node* node) {
47 return Define(node, 47 return Define(node,
48 UnallocatedOperand(UnallocatedOperand::SAME_AS_FIRST_INPUT, 48 UnallocatedOperand(UnallocatedOperand::SAME_AS_FIRST_INPUT,
49 GetVReg(node))); 49 GetVReg(node)));
50 } 50 }
51 51
52 InstructionOperand DefineAsFixed(Node* node, Register reg) { 52 InstructionOperand DefineAsFixed(Node* node, Register reg) {
53 return Define(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER, 53 return Define(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER,
54 Register::ToAllocationIndex(reg), 54 reg.code(), GetVReg(node)));
55 GetVReg(node)));
56 } 55 }
57 56
58 InstructionOperand DefineAsFixed(Node* node, DoubleRegister reg) { 57 InstructionOperand DefineAsFixed(Node* node, DoubleRegister reg) {
59 return Define(node, 58 return Define(node,
60 UnallocatedOperand(UnallocatedOperand::FIXED_DOUBLE_REGISTER, 59 UnallocatedOperand(UnallocatedOperand::FIXED_DOUBLE_REGISTER,
61 DoubleRegister::ToAllocationIndex(reg), 60 reg.code(), GetVReg(node)));
62 GetVReg(node)));
63 } 61 }
64 62
65 InstructionOperand DefineAsConstant(Node* node) { 63 InstructionOperand DefineAsConstant(Node* node) {
66 selector()->MarkAsDefined(node); 64 selector()->MarkAsDefined(node);
67 int virtual_register = GetVReg(node); 65 int virtual_register = GetVReg(node);
68 sequence()->AddConstant(virtual_register, ToConstant(node)); 66 sequence()->AddConstant(virtual_register, ToConstant(node));
69 return ConstantOperand(virtual_register); 67 return ConstantOperand(virtual_register);
70 } 68 }
71 69
72 InstructionOperand DefineAsLocation(Node* node, LinkageLocation location, 70 InstructionOperand DefineAsLocation(Node* node, LinkageLocation location,
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100 98
101 // Use a unique register for the node that does not alias any temporary or 99 // Use a unique register for the node that does not alias any temporary or
102 // output registers. 100 // output registers.
103 InstructionOperand UseUniqueRegister(Node* node) { 101 InstructionOperand UseUniqueRegister(Node* node) {
104 return Use(node, UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER, 102 return Use(node, UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
105 GetVReg(node))); 103 GetVReg(node)));
106 } 104 }
107 105
108 InstructionOperand UseFixed(Node* node, Register reg) { 106 InstructionOperand UseFixed(Node* node, Register reg) {
109 return Use(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER, 107 return Use(node, UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER,
110 Register::ToAllocationIndex(reg), 108 reg.code(), GetVReg(node)));
111 GetVReg(node)));
112 } 109 }
113 110
114 InstructionOperand UseFixed(Node* node, DoubleRegister reg) { 111 InstructionOperand UseFixed(Node* node, DoubleRegister reg) {
115 return Use(node, 112 return Use(node,
116 UnallocatedOperand(UnallocatedOperand::FIXED_DOUBLE_REGISTER, 113 UnallocatedOperand(UnallocatedOperand::FIXED_DOUBLE_REGISTER,
117 DoubleRegister::ToAllocationIndex(reg), 114 reg.code(), GetVReg(node)));
118 GetVReg(node)));
119 } 115 }
120 116
121 InstructionOperand UseImmediate(Node* node) { 117 InstructionOperand UseImmediate(Node* node) {
122 return sequence()->AddImmediate(ToConstant(node)); 118 return sequence()->AddImmediate(ToConstant(node));
123 } 119 }
124 120
125 InstructionOperand UseLocation(Node* node, LinkageLocation location, 121 InstructionOperand UseLocation(Node* node, LinkageLocation location,
126 MachineType type) { 122 MachineType type) {
127 return Use(node, ToUnallocatedOperand(location, type, GetVReg(node))); 123 return Use(node, ToUnallocatedOperand(location, type, GetVReg(node)));
128 } 124 }
129 125
130 InstructionOperand TempRegister() { 126 InstructionOperand TempRegister() {
131 return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER, 127 return UnallocatedOperand(UnallocatedOperand::MUST_HAVE_REGISTER,
132 UnallocatedOperand::USED_AT_START, 128 UnallocatedOperand::USED_AT_START,
133 sequence()->NextVirtualRegister()); 129 sequence()->NextVirtualRegister());
134 } 130 }
135 131
136 InstructionOperand TempDoubleRegister() { 132 InstructionOperand TempDoubleRegister() {
137 UnallocatedOperand op = UnallocatedOperand( 133 UnallocatedOperand op = UnallocatedOperand(
138 UnallocatedOperand::MUST_HAVE_REGISTER, 134 UnallocatedOperand::MUST_HAVE_REGISTER,
139 UnallocatedOperand::USED_AT_START, sequence()->NextVirtualRegister()); 135 UnallocatedOperand::USED_AT_START, sequence()->NextVirtualRegister());
140 sequence()->MarkAsRepresentation(kRepFloat64, op.virtual_register()); 136 sequence()->MarkAsRepresentation(kRepFloat64, op.virtual_register());
141 return op; 137 return op;
142 } 138 }
143 139
144 InstructionOperand TempRegister(Register reg) { 140 InstructionOperand TempRegister(Register reg) {
145 return UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER, 141 return UnallocatedOperand(UnallocatedOperand::FIXED_REGISTER, reg.code(),
146 Register::ToAllocationIndex(reg),
147 InstructionOperand::kInvalidVirtualRegister); 142 InstructionOperand::kInvalidVirtualRegister);
148 } 143 }
149 144
150 InstructionOperand TempImmediate(int32_t imm) { 145 InstructionOperand TempImmediate(int32_t imm) {
151 return sequence()->AddImmediate(Constant(imm)); 146 return sequence()->AddImmediate(Constant(imm));
152 } 147 }
153 148
154 InstructionOperand TempLocation(LinkageLocation location, MachineType type) { 149 InstructionOperand TempLocation(LinkageLocation location, MachineType type) {
155 return ToUnallocatedOperand(location, type, 150 return ToUnallocatedOperand(location, type,
156 sequence()->NextVirtualRegister()); 151 sequence()->NextVirtualRegister());
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342 : (frame_state_descriptor->GetTotalSize() + 337 : (frame_state_descriptor->GetTotalSize() +
343 1); // Include deopt id. 338 1); // Include deopt id.
344 } 339 }
345 }; 340 };
346 341
347 } // namespace compiler 342 } // namespace compiler
348 } // namespace internal 343 } // namespace internal
349 } // namespace v8 344 } // namespace v8
350 345
351 #endif // V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_ 346 #endif // V8_COMPILER_INSTRUCTION_SELECTOR_IMPL_H_
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