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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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43 #include "src/debug/debug.h" | 43 #include "src/debug/debug.h" |
44 | 44 |
45 | 45 |
46 namespace v8 { | 46 namespace v8 { |
47 namespace internal { | 47 namespace internal { |
48 | 48 |
49 | 49 |
50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(VFP3); } | 50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(VFP3); } |
51 | 51 |
52 | 52 |
53 int Register::NumAllocatableRegisters() { | 53 int DoubleRegister::NumRegisters() { |
54 return kMaxNumAllocatableRegisters; | |
55 } | |
56 | |
57 | |
58 int DwVfpRegister::NumRegisters() { | |
59 return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16; | 54 return CpuFeatures::IsSupported(VFP32DREGS) ? 32 : 16; |
60 } | 55 } |
61 | 56 |
62 | 57 |
63 int DwVfpRegister::NumReservedRegisters() { | |
64 return kNumReservedRegisters; | |
65 } | |
66 | |
67 | |
68 int DwVfpRegister::NumAllocatableRegisters() { | |
69 return NumRegisters() - kNumReservedRegisters; | |
70 } | |
71 | |
72 | |
73 // static | |
74 int DwVfpRegister::NumAllocatableAliasedRegisters() { | |
75 return LowDwVfpRegister::kMaxNumLowRegisters - kNumReservedRegisters; | |
76 } | |
77 | |
78 | |
79 int DwVfpRegister::ToAllocationIndex(DwVfpRegister reg) { | |
80 DCHECK(!reg.is(kDoubleRegZero)); | |
81 DCHECK(!reg.is(kScratchDoubleReg)); | |
82 if (reg.code() > kDoubleRegZero.code()) { | |
83 return reg.code() - kNumReservedRegisters; | |
84 } | |
85 return reg.code(); | |
86 } | |
87 | |
88 | |
89 DwVfpRegister DwVfpRegister::FromAllocationIndex(int index) { | |
90 DCHECK(index >= 0 && index < NumAllocatableRegisters()); | |
91 DCHECK(kScratchDoubleReg.code() - kDoubleRegZero.code() == | |
92 kNumReservedRegisters - 1); | |
93 if (index >= kDoubleRegZero.code()) { | |
94 return from_code(index + kNumReservedRegisters); | |
95 } | |
96 return from_code(index); | |
97 } | |
98 | |
99 | |
100 void RelocInfo::apply(intptr_t delta) { | 58 void RelocInfo::apply(intptr_t delta) { |
101 if (RelocInfo::IsInternalReference(rmode_)) { | 59 if (RelocInfo::IsInternalReference(rmode_)) { |
102 // absolute code pointer inside code object moves with the code object. | 60 // absolute code pointer inside code object moves with the code object. |
103 int32_t* p = reinterpret_cast<int32_t*>(pc_); | 61 int32_t* p = reinterpret_cast<int32_t*>(pc_); |
104 *p += delta; // relocate entry | 62 *p += delta; // relocate entry |
105 } | 63 } |
106 // We do not use pc relative addressing on ARM, so there is | 64 // We do not use pc relative addressing on ARM, so there is |
107 // nothing else to do. | 65 // nothing else to do. |
108 } | 66 } |
109 | 67 |
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662 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 620 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
663 CpuFeatures::FlushICache(pc, 4 * kInstrSize); | 621 CpuFeatures::FlushICache(pc, 4 * kInstrSize); |
664 } | 622 } |
665 } | 623 } |
666 } | 624 } |
667 | 625 |
668 | 626 |
669 } } // namespace v8::internal | 627 } } // namespace v8::internal |
670 | 628 |
671 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ | 629 #endif // V8_ARM_ASSEMBLER_ARM_INL_H_ |
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