Make FlushICache NOP for Nvidia Denver 1.0 only

src/base/cpu.h

 // Copyright 2006-2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // This module contains the architecture-specific code. This make the rest of
 // the code less dependent on differences between different processor
 // architecture.
 // The classes have the same definition for all architectures. The
 // implementation for a particular architecture is put in cpu_<arch>.cc.
 // The build system then uses the implementation for the target architecture.
@@ skipping 41 matching lines @@
   int part() const { return part_; }
 
   // ARM-specific part codes
   static const int ARM_CORTEX_A5 = 0xc05;
   static const int ARM_CORTEX_A7 = 0xc07;
   static const int ARM_CORTEX_A8 = 0xc08;
   static const int ARM_CORTEX_A9 = 0xc09;
   static const int ARM_CORTEX_A12 = 0xc0c;
   static const int ARM_CORTEX_A15 = 0xc0f;
 
+  // Denver-specific part code
+  static const int NVIDIA_DENVER_V10 = 0x002;
+
   // PPC-specific part codes
   enum {
     PPC_POWER5,
     PPC_POWER6,
     PPC_POWER7,
     PPC_POWER8,
     PPC_G4,
     PPC_G5,
     PPC_PA6T
   };
@@ skipping 66 matching lines @@
   bool has_thumb2_;
   bool has_vfp_;
   bool has_vfp3_;
   bool has_vfp3_d32_;
   bool is_fp64_mode_;
 };
 
 } }  // namespace v8::base
 
 #endif  // V8_BASE_CPU_H_