Make FlushICache NOP for Nvidia Denver 1.0 only

src/arm64/assembler-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
@@ skipping 34 matching lines @@
 void CpuFeatures::ProbeImpl(bool cross_compile) {
   // AArch64 has no configuration options, no further probing is required.
   supported_ = 0;
 
   // Only use statically determined features for cross compile (snapshot).
   if (cross_compile) return;
 
   // Probe for runtime features
   base::CPU cpu;
   if (cpu.implementer() == base::CPU::NVIDIA &&
-      cpu.variant() == base::CPU::NVIDIA_DENVER) {
+      cpu.variant() == base::CPU::NVIDIA_DENVER &&

[Rodolph Perfetta (ARM), 2015/08/19 08:19:27]

Denver is a CPU part (like A57, A53 for ARM), so it looks like the checks are
switched: part should be Denver and variant should be less than 0, 1 or 2. no?
The initial code was wrong then.

[avanbrunt, 2015/08/19 16:35:38]

Implementer == 'N' and and variant == 0x0 combined identify the Denver family.
The different implementations are distinguished by the primary part number. Part
number 0x000, 0x001, and 0x002 all have a coherent instruction cache.

+      cpu.part() <= base::CPU::NVIDIA_DENVER_V10) {
     supported_ |= 1u << COHERENT_CACHE;
   }
 }
 
 
 void CpuFeatures::PrintTarget() { }
 
 
 void CpuFeatures::PrintFeatures() {
   printf("COHERENT_CACHE=%d\n", CpuFeatures::IsSupported(COHERENT_CACHE));
@@ skipping 3071 matching lines @@
   movk(scratch, (target_offset >> 32) & 0xFFFF, 32);
   DCHECK((target_offset >> 48) == 0);
   add(rd, rd, scratch);
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_ARM64