Index: runtime/vm/flow_graph_compiler_ia32.cc |
diff --git a/runtime/vm/flow_graph_compiler_ia32.cc b/runtime/vm/flow_graph_compiler_ia32.cc |
index 6b0a35ef46c39c9d646da0dbe720b8e5dbabb436..74ba2e064ae76179b1691a7893f721974731e118 100644 |
--- a/runtime/vm/flow_graph_compiler_ia32.cc |
+++ b/runtime/vm/flow_graph_compiler_ia32.cc |
@@ -1332,18 +1332,18 @@ void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) { |
// TODO(vegorov): consider saving only caller save (volatile) registers. |
const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count(); |
if (xmm_regs_count > 0) { |
- __ subl(ESP, Immediate(xmm_regs_count * kDoubleSize)); |
+ __ subl(ESP, Immediate(xmm_regs_count * kFpuRegisterSize)); |
// Store XMM registers with the lowest register number at the lowest |
// address. |
intptr_t offset = 0; |
for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { |
XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); |
if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { |
- __ movsd(Address(ESP, offset), xmm_reg); |
- offset += kDoubleSize; |
+ __ movups(Address(ESP, offset), xmm_reg); |
+ offset += kFpuRegisterSize; |
} |
} |
- ASSERT(offset == (xmm_regs_count * kDoubleSize)); |
+ ASSERT(offset == (xmm_regs_count * kFpuRegisterSize)); |
} |
// Store general purpose registers with the highest register number at the |
@@ -1374,11 +1374,11 @@ void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) { |
for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { |
XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); |
if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { |
- __ movsd(xmm_reg, Address(ESP, offset)); |
- offset += kDoubleSize; |
+ __ movups(xmm_reg, Address(ESP, offset)); |
+ offset += kFpuRegisterSize; |
} |
} |
- ASSERT(offset == (xmm_regs_count * kDoubleSize)); |
+ ASSERT(offset == (xmm_regs_count * kFpuRegisterSize)); |
__ addl(ESP, Immediate(offset)); |
} |
} |