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Issue 12871015: SIMD plumbing (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: s/materialize/Materialize Created 7 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_X64. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_X64.
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/flow_graph_compiler.h" 8 #include "vm/flow_graph_compiler.h"
9 9
10 #include "lib/error.h" 10 #include "lib/error.h"
(...skipping 1314 matching lines...) Expand 10 before | Expand all | Expand 10 after
1325 __ Drop(1); 1325 __ Drop(1);
1326 __ jmp(skip_call); 1326 __ jmp(skip_call);
1327 __ Bind(&fall_through); 1327 __ Bind(&fall_through);
1328 } 1328 }
1329 1329
1330 1330
1331 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) { 1331 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
1332 // TODO(vegorov): consider saving only caller save (volatile) registers. 1332 // TODO(vegorov): consider saving only caller save (volatile) registers.
1333 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count(); 1333 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count();
1334 if (xmm_regs_count > 0) { 1334 if (xmm_regs_count > 0) {
1335 __ subq(RSP, Immediate(xmm_regs_count * kDoubleSize)); 1335 __ subq(RSP, Immediate(xmm_regs_count * kFpuRegisterSize));
1336 // Store XMM registers with the lowest register number at the lowest 1336 // Store XMM registers with the lowest register number at the lowest
1337 // address. 1337 // address.
1338 intptr_t offset = 0; 1338 intptr_t offset = 0;
1339 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { 1339 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
1340 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); 1340 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
1341 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { 1341 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
1342 __ movsd(Address(RSP, offset), xmm_reg); 1342 __ movups(Address(RSP, offset), xmm_reg);
1343 offset += kDoubleSize; 1343 offset += kFpuRegisterSize;
1344 } 1344 }
1345 } 1345 }
1346 ASSERT(offset == (xmm_regs_count * kDoubleSize)); 1346 ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
1347 } 1347 }
1348 1348
1349 // Store general purpose registers with the highest register number at the 1349 // Store general purpose registers with the highest register number at the
1350 // lowest address. 1350 // lowest address.
1351 for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) { 1351 for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) {
1352 Register reg = static_cast<Register>(reg_idx); 1352 Register reg = static_cast<Register>(reg_idx);
1353 if (locs->live_registers()->ContainsRegister(reg)) { 1353 if (locs->live_registers()->ContainsRegister(reg)) {
1354 __ pushq(reg); 1354 __ pushq(reg);
1355 } 1355 }
1356 } 1356 }
(...skipping 10 matching lines...) Expand all
1367 } 1367 }
1368 } 1368 }
1369 1369
1370 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count(); 1370 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count();
1371 if (xmm_regs_count > 0) { 1371 if (xmm_regs_count > 0) {
1372 // XMM registers have the lowest register number at the lowest address. 1372 // XMM registers have the lowest register number at the lowest address.
1373 intptr_t offset = 0; 1373 intptr_t offset = 0;
1374 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { 1374 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
1375 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); 1375 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
1376 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { 1376 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
1377 __ movsd(xmm_reg, Address(RSP, offset)); 1377 __ movups(xmm_reg, Address(RSP, offset));
1378 offset += kDoubleSize; 1378 offset += kFpuRegisterSize;
1379 } 1379 }
1380 } 1380 }
1381 ASSERT(offset == (xmm_regs_count * kDoubleSize)); 1381 ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
1382 __ addq(RSP, Immediate(offset)); 1382 __ addq(RSP, Immediate(offset));
1383 } 1383 }
1384 } 1384 }
1385 1385
1386 1386
1387 void FlowGraphCompiler::EmitTestAndCall(const ICData& ic_data, 1387 void FlowGraphCompiler::EmitTestAndCall(const ICData& ic_data,
1388 Register class_id_reg, 1388 Register class_id_reg,
1389 intptr_t arg_count, 1389 intptr_t arg_count,
1390 const Array& arg_names, 1390 const Array& arg_names,
1391 Label* deopt, 1391 Label* deopt,
(...skipping 286 matching lines...) Expand 10 before | Expand all | Expand 10 after
1678 void ParallelMoveResolver::Exchange(const Address& mem1, const Address& mem2) { 1678 void ParallelMoveResolver::Exchange(const Address& mem1, const Address& mem2) {
1679 __ Exchange(mem1, mem2); 1679 __ Exchange(mem1, mem2);
1680 } 1680 }
1681 1681
1682 1682
1683 #undef __ 1683 #undef __
1684 1684
1685 } // namespace dart 1685 } // namespace dart
1686 1686
1687 #endif // defined TARGET_ARCH_X64 1687 #endif // defined TARGET_ARCH_X64
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